src/cpu: Fix typo

Change-Id: I13dec72b2de2a525d45909e697c33fbdc31111cb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27918
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

src/cpu/intel/fsp_model_206ax/finalize.c

@@ -69,7 +69,7 @@ void intel_model_206ax_finalize_smm(void)
 	msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
 #endif
 
-	/* Lock TM interupts - route thermal events to all processors */
+	/* Lock TM interrupts - route thermal events to all processors */
 	msr_set_bit(MSR_MISC_PWR_MGMT, 22);
 
 	/* Lock memory configuration to protect SMM */

src/cpu/intel/haswell/finalize.c

@@ -72,7 +72,7 @@ void intel_cpu_haswell_finalize_smm(void)
 	msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
 #endif
 
-	/* Lock TM interupts - route thermal events to all processors */
+	/* Lock TM interrupts - route thermal events to all processors */
 	msr_set_bit(MSR_MISC_PWR_MGMT, 22);
 
 	/* Lock memory configuration to protect SMM */

src/cpu/intel/model_2065x/finalize.c

@@ -52,6 +52,6 @@ void intel_model_2065x_finalize_smm(void)
 	if (cpuid_ecx(1) & (1 << 25))
 		msr_set_bit(MSR_FEATURE_CONFIG, 0);
 
-	/* Lock TM interupts - route thermal events to all processors */
+	/* Lock TM interrupts - route thermal events to all processors */
 	msr_set_bit(MSR_MISC_PWR_MGMT, 22);
 }

src/cpu/intel/model_206ax/finalize.c

@@ -70,7 +70,7 @@ void intel_model_206ax_finalize_smm(void)
 	msr_set_bit(MSR_PP1_POWER_LIMIT, 31);
 #endif
 
-	/* Lock TM interupts - route thermal events to all processors */
+	/* Lock TM interrupts - route thermal events to all processors */
 	msr_set_bit(MSR_MISC_PWR_MGMT, 22);
 
 	/* Lock memory configuration to protect SMM */

src/cpu/x86/16bit/entry16.inc

@@ -89,7 +89,7 @@ _start16bit:
 	 * must be loaded at or above 0xffff0000 or below 0x100000.
 	 *
 	 * The linker scripts computes gdtptr16_offset by simply returning
-	 * the low 16 bits.  This means that the intial segment used
+	 * the low 16 bits.  This means that the initial segment used
 	 * when start is called must be 64K aligned.  This should not
 	 * restrict the address as the ip address can be anything.
 	 *

src/cpu/x86/sipi_vector.S

@@ -17,7 +17,7 @@
 #include <cpu/x86/cr.h>
 #include <cpu/amd/mtrr.h>
 
-/* The SIPI vector is responsible for initializing the APs in the sytem. It
+/* The SIPI vector is responsible for initializing the APs in the system. It
  * loads microcode, sets up MSRs, and enables caching before calling into
  * C code. */