mb/google/kahlee: Drop macro H1_PCH_INT

This change drops H1_PCH_INT macro for GPIO_9 since it is the same
across all variants. Also, the name differed from the schematics
version `H1_PCH_INT_ODL` creating confusion.

Change-Id: I7b038426a984d8abc460a0da3ee1dc5559d7ad5f
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43015
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h

@@ -11,9 +11,6 @@
 # define MEM_CONFIG2		GPIO_131
 # define MEM_CONFIG3		GPIO_132
 
-/* CR50 interrupt pin */
-#define H1_PCH_INT		GPIO_9
-
 /* SPI Write protect */
 #define CROS_WP_GPIO		GPIO_122
 #define GPIO_EC_IN_RW		GPIO_15

src/mainboard/google/kahlee/variants/baseboard/tpm_tis.c

@@ -6,5 +6,5 @@
 
 int tis_plat_irq_status(void)
 {
-	return gpio_interrupt_status(H1_PCH_INT);
+	return gpio_interrupt_status(GPIO_9);
 }