soc/intel/apollolake: Configure PCIe root port #3 for GLK WiFi

GLK Octopus uses PCIe root port #3 (PCIe ID 13.0) for discrete PCIe
wifi card.

BUG=None
BRANCH=None
TEST=Use Stone Peak discrete wifi card and test s0ix.

Change-Id: I8a064c5d97e4765bd97ec560c89b207b574b1fa1
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-on: https://review.coreboot.org/25638
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/soc/intel/apollolake/acpi/pcie.asl

@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2016 Intel Corporation.
+ * Copyright (C) 2016 Intel Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -22,3 +22,11 @@ Device (RP01)
 
 	#include "pcie_port.asl"
 }
+
+Device (RP03)
+{
+	Name (_ADR, 0x00130000)
+	Name (_DDN, "PCIe-A 0")
+
+	#include "pcie_port.asl"
+}

src/soc/intel/apollolake/chip.c

@@ -111,6 +111,8 @@ static const char *soc_acpi_name(const struct device *dev)
 	case PCH_DEVFN_SDIO:
 		return "SDIO";
 	/* PCIe */
+	case PCH_DEVFN_PCIE1:
+		return "RP03";
 	case PCH_DEVFN_PCIE5:
 		return "RP01";
 	}