src/mainboard/glkrvp: Fix ec_in_rw and wp
Change-Id: I513b26d39973d9714b531d1ab0755c66d19eb332 Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/22195 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -30,8 +30,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
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{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
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{-1, ACTIVE_HIGH, 0, "power"},
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{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
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{GPIO_EC_IN_RW, ACTIVE_HIGH,
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gpio_get(GPIO_EC_IN_RW), "EC in RW"},
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{-1, ACTIVE_HIGH, 0, "EC in RW"},
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};
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lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
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}
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@ -71,8 +70,7 @@ int clear_recovery_mode_switch(void)
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int get_write_protect_state(void)
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{
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/* Read PCH_WP GPIO. */
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return gpio_get(GPIO_PCH_WP);
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return 0;
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}
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void mainboard_chromeos_acpi_generate(void)
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@ -284,8 +284,8 @@ variant_sleep_gpio_table(size_t *num)
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static const struct cros_gpio cros_gpios[] = {
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#if 0
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CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, GPIO_COMM_NW_NAME),
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CROS_GPIO_WP_AH(PAD_NW(GPIO_PCH_WP), GPIO_COMM_NW_NAME),
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CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
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#endif
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};
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@ -29,10 +29,6 @@
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#define GPE_EC_WAKE GPE0_DW1_06
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/* Write Protect and indication if EC is in RW code. */
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#define GPIO_PCH_WP GPIO_75
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#define GPIO_EC_IN_RW GPIO_41
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/* Memory SKU GPIOs. */
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#define MEM_CONFIG3 GPIO_45
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#define MEM_CONFIG2 GPIO_38
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