sb/intel/i82801ix: fetch initial timestamp in bootblock

TESTED on Thinkpad x200

Change-Id: I3cd286709f8734793dc6ae303215433eff29d25b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/22077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Arthur Heymans 2017-10-17 22:13:43 +02:00 committed by Martin Roth
parent a35ad0e6ee
commit f1c8ede1a5
5 changed files with 28 additions and 3 deletions

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@ -70,7 +70,7 @@ void mainboard_romstage_entry(unsigned long bist)
int cbmem_initted;
u16 reg16;
timestamp_init(timestamp_get());
timestamp_init(get_initial_timestamp());
timestamp_add_now(TS_START_ROMSTAGE);
/* basic northbridge setup, including MMCONF BAR */

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@ -59,7 +59,7 @@ void mainboard_romstage_entry(unsigned long bist)
int cbmem_initted;
u16 reg16;
timestamp_init(timestamp_get());
timestamp_init(get_initial_timestamp());
timestamp_add_now(TS_START_ROMSTAGE);
/* basic northbridge setup, including MMCONF BAR */

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@ -125,7 +125,7 @@ void mainboard_romstage_entry(unsigned long bist)
int cbmem_initted;
u16 reg16;
timestamp_init(timestamp_get());
timestamp_init(get_initial_timestamp());
timestamp_add_now(TS_START_ROMSTAGE);
/* basic northbridge setup, including MMCONF BAR */

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@ -14,6 +14,19 @@
*/
#include <arch/io.h>
#include <cpu/x86/tsc.h>
static void store_initial_timestamp(void)
{
/*
* We have two 32bit scratchpad registers available:
* D0:F0 0xdc (SKPAD)
* D31:F2 0xd0 (SATA SP)
*/
tsc_t tsc = rdtsc();
pci_write_config32(PCI_DEV(0, 0x00, 0), 0xdc, tsc.lo);
pci_write_config32(PCI_DEV(0, 0x1f, 2), 0xd0, tsc.hi);
}
static void enable_spi_prefetch(void)
{
@ -30,5 +43,6 @@ static void enable_spi_prefetch(void)
static void bootblock_southbridge_init(void)
{
store_initial_timestamp();
enable_spi_prefetch();
}

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@ -15,8 +15,19 @@
*/
#include <arch/io.h>
#include <timestamp.h>
#include <cpu/x86/tsc.h>
#include "i82801ix.h"
uint64_t get_initial_timestamp(void)
{
tsc_t base_time = {
.lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc),
.hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0)
};
return tsc_to_uint64(base_time);
}
void i82801ix_early_init(void)
{
const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0);