sb/intel/i82801ix: fetch initial timestamp in bootblock
TESTED on Thinkpad x200 Change-Id: I3cd286709f8734793dc6ae303215433eff29d25b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22077 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -70,7 +70,7 @@ void mainboard_romstage_entry(unsigned long bist)
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int cbmem_initted;
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u16 reg16;
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timestamp_init(timestamp_get());
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timestamp_init(get_initial_timestamp());
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timestamp_add_now(TS_START_ROMSTAGE);
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/* basic northbridge setup, including MMCONF BAR */
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@ -59,7 +59,7 @@ void mainboard_romstage_entry(unsigned long bist)
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int cbmem_initted;
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u16 reg16;
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timestamp_init(timestamp_get());
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timestamp_init(get_initial_timestamp());
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timestamp_add_now(TS_START_ROMSTAGE);
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/* basic northbridge setup, including MMCONF BAR */
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@ -125,7 +125,7 @@ void mainboard_romstage_entry(unsigned long bist)
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int cbmem_initted;
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u16 reg16;
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timestamp_init(timestamp_get());
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timestamp_init(get_initial_timestamp());
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timestamp_add_now(TS_START_ROMSTAGE);
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/* basic northbridge setup, including MMCONF BAR */
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@ -14,6 +14,19 @@
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*/
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#include <arch/io.h>
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#include <cpu/x86/tsc.h>
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static void store_initial_timestamp(void)
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{
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/*
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* We have two 32bit scratchpad registers available:
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* D0:F0 0xdc (SKPAD)
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* D31:F2 0xd0 (SATA SP)
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*/
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tsc_t tsc = rdtsc();
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pci_write_config32(PCI_DEV(0, 0x00, 0), 0xdc, tsc.lo);
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pci_write_config32(PCI_DEV(0, 0x1f, 2), 0xd0, tsc.hi);
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}
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static void enable_spi_prefetch(void)
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{
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@ -30,5 +43,6 @@ static void enable_spi_prefetch(void)
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static void bootblock_southbridge_init(void)
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{
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store_initial_timestamp();
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enable_spi_prefetch();
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}
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@ -15,8 +15,19 @@
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*/
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#include <arch/io.h>
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#include <timestamp.h>
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#include <cpu/x86/tsc.h>
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#include "i82801ix.h"
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uint64_t get_initial_timestamp(void)
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{
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tsc_t base_time = {
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.lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc),
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.hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0)
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};
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return tsc_to_uint64(base_time);
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}
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void i82801ix_early_init(void)
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{
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const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0);
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