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intel/skylake: Adding provision to set voltages to the I2C ports 

This patch adds an UPD/VPD parameter to set voltages to the
I2C ports individually via devicetree.cb

BRANCH=None
BUG=chrome-os-partner:47821
TEST=Tesed by setting voltage via devicetree.cb
and verified voltage level using a DSO probe.

CQ-DEPEND=CL:*242225, CL:*241206

Change-Id: Iaeb1ab3f9724aa1139c876dc63250469661d8439
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fc73b98529ad1eb187f97a4177beda4224f473d1
Original-Change-Id: Ib477ad26667ef59cd298b5e20a68a8c68d85bd8d
Original-Signed-off-by: Naresh G Solanki <Naresh.Solanki@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/315167
Original-Commit-Ready: Naresh Solanki <naresh.solanki@intel.com>
Original-Tested-by: Naresh Solanki <naresh.solanki@intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/13006
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Naresh G Solanki 2015-12-02 19:59:49 +05:30 committed by Patrick Georgi
parent c6950576af
commit f1eac38bda
2 changed files with 24 additions and 0 deletions
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20
src/soc/intel/skylake/chip.c
View File

@ -346,6 +346,8 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
params->SerialIrqConfigStartFramePulse = config->SerialIrqConfigStartFramePulse;
params->SkipMpInit = config->FspSkipMpInit;
memcpy(params->SerialIoI2cVoltage, config->SerialIoI2cVoltage,
sizeof(params->SerialIoI2cVoltage));
/*
* To disable Heci, the Psf needs to be left unlocked
@ -991,6 +993,24 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *original,
fsp_display_upd_value("VrConfigEnable[4]", 1,
original->VrConfigEnable[4],
params->VrConfigEnable[4]);
fsp_display_upd_value("SerialIoI2cVoltage[0]", 1,
original->SerialIoI2cVoltage[0],
params->SerialIoI2cVoltage[0]);
fsp_display_upd_value("SerialIoI2cVoltage[1]", 1,
original->SerialIoI2cVoltage[1],
params->SerialIoI2cVoltage[1]);
fsp_display_upd_value("SerialIoI2cVoltage[2]", 1,
original->SerialIoI2cVoltage[2],
params->SerialIoI2cVoltage[2]);
fsp_display_upd_value("SerialIoI2cVoltage[3]", 1,
original->SerialIoI2cVoltage[3],
params->SerialIoI2cVoltage[3]);
fsp_display_upd_value("SerialIoI2cVoltage[4]", 1,
original->SerialIoI2cVoltage[4],
params->SerialIoI2cVoltage[4]);
fsp_display_upd_value("SerialIoI2cVoltage[5]", 1,
original->SerialIoI2cVoltage[5],
params->SerialIoI2cVoltage[5]);
}
static void pci_set_subsystem(device_t dev, unsigned vendor, unsigned device)

4
src/soc/intel/skylake/chip.h
View File

@ -177,6 +177,9 @@ struct soc_intel_skylake_config {
*/
u8 SerialIoDevMode[PchSerialIoIndexMax];
/* I2C voltage select. Value: 0: 3.3V , 1: 1.8V.*/
u8 SerialIoI2cVoltage[6];
/* Camera */
u8 Cio2Enable;
@ -309,6 +312,7 @@ struct soc_intel_skylake_config {
*/
u8 SerialIrqConfigStartFramePulse;
u8 FspSkipMpInit;
/* VrConfig Settings for 5 domains
* 0 = System Agent, 1 = IA Core, 2 = Ring,
* 3 = GT unsliced, 4 = GT sliced