GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Looks like this should have become cpu init code after growing up. The 

remaining questions are:

- Why was it never used?
- Why is it in /src and not in /src/cpu/ppc?

Given this is dead code and part of an unmaintained powerpc port, I consider
removing it trivial. (The code really does not do much)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2009-09-23 18:54:18 +00:00 committed by Stefan Reinauer
parent c13093b148
commit f250f191f8
3 changed files with 0 additions and 200 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
src/pmc/altimus/mpc7410/Config.lb
View File

@ -1,15 +0,0 @@
##
## CPU initialization
##
dir /cpu/ppc/mpc74xx
##
## Include the secondary Configuration files
##
dir /northbridge/motrola/mpc107
##
## Build the objects we have code for in this directory.
##
object mpc7410.o
object setup.o

81
src/pmc/altimus/mpc7410/mpc7410.c
View File

@ -1,81 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <ppc.h>
#include <ppcreg.h>
#include <string.h>
#include <console/console.h>
#define ONEMEG 0x00100000
#define HALFMEG 0x00080000
unsigned long memory_base = 0;
unsigned long memory_top = 0;
unsigned long memory_size = 0;
//extern char __heap_end[];
extern unsigned mpc107_config_memory(void);
unsigned config_memory(unsigned offset)
{
//extern char __start[];
//extern char __bss_start[];
//unsigned rom_image = (unsigned) __start & 0xfff00000;
//unsigned physical = rom_image + offset;
//unsigned codesize = (unsigned) __bss_start - rom_image;
#if 0
/* At this point, DBAT 0 is memory, 1 is variable, 2 is the rom image,
and 3 is IO. */
ppc_set_io_dbat_reloc(2, rom_image, physical, ONEMEG);
ppc_set_io_dbat (3, 0xf0000000, 0x10000000);
if ( rom_image != physical )
ppc_set_ibats_reloc(rom_image, physical, ONEMEG);
else
ppc_set_ibats(physical, ONEMEG);
printk_debug("bsp_init_memory...\n");
#endif
ppc_setup_cpu(1); /* icache enable = 1 */
//ppc_enable_mmu();
memory_size = mpc107_config_memory();
/* If we have some working RAM, we copy the code and rodata into it.
* This allows us to reprogram the flash later. */
#if 0
if (memory_size)
{
unsigned onemeg = memory_size - ONEMEG;
ppc_set_mem_dbat_reloc(1, onemeg, onemeg, ONEMEG);
memcpy((void *)onemeg, (void *)rom_image, codesize);
memset((void *)(onemeg + codesize), 0, ONEMEG - codesize);
ppc_set_ibats_reloc2(rom_image, physical, onemeg, ONEMEG);
ppc_set_mem_dbat_reloc(2, rom_image, onemeg, ONEMEG);
make_coherent((void *)onemeg, ONEMEG);
}
ppc_set_memory_dbat (memory_size);
#endif
//ppc_enable_dcache ();
return memory_size;
}

104
src/pmc/altimus/mpc7410/setup.c
View File

@ -1,104 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "ppc.h"
#include "ppcreg.h"
#include "ppc74xx.h"
extern void ppc_init_float_registers(const double *);
/*RODATA static const double dummy_float = 1.0;*/
static const double dummy_float = 1.0;
#define HID0_DCACHE HID0_DCE
#define MSR_DATA MSR_DR
void ppc_setup_cpu(int icache)
{
int type = ppc_getpvr() >> 16;
int version = ppc_getpvr() & 0xffff;
if (type == 0xc)
{
if (version == 0x0200)
ppc_set1015(0x19000004);
else if (((version & 0xff00) == 0x0200) &&
(version != 0x0209))
ppc_set1015(0x01000000);
}
if (icache)
{
ppc_sethid0(HID0_NHR | HID0_BHT | HID0_ICE | HID0_ICFI
| HID0_BTIC | HID0_DCACHE);
ppc_sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_ICE
| HID0_BTIC | HID0_DCACHE);
}
else
{
ppc_sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_BTIC
| HID0_DCACHE);
}
#if 1
/* if (type == 8 || type == 12) */
{
ppc_setmsr(MSR_FP | MSR_DATA);
ppc_init_float_registers(&dummy_float);
}
#endif
}
void ppc_enable_dcache(void)
{
/*
* Already enabled in crt0.S
*/
#if 0
unsigned hid0 = ppc_gethid0();
ppc_sethid0(hid0 | HID0_DCFI | HID0_DCE);
ppc_sethid0(hid0 | HID0_DCE);
#endif
}
void ppc_disable_dcache(void)
{
unsigned hid0 = ppc_gethid0();
ppc_sethid0(hid0 & ~HID0_DCE);
}
void ppc_enable_mmu(void)
{
unsigned msr = ppc_getmsr();
ppc_setmsr(msr | MSR_DR | MSR_IR);
}
void make_coherent(void *base, unsigned length)
{
unsigned hid0 = ppc_gethid0();
if (hid0 & HID0_DCE)
{
unsigned i;
unsigned offset = 0x1f & (unsigned) base;
unsigned adjusted_base = (unsigned) base & ~0x1f;
for(i = 0; i < length + offset; i+= 32)
__asm__ volatile ("dcbf %1,%0" : : "r" (adjusted_base), "r" (i));
if (hid0 & HID0_ICE)
for(i = 0; i < length + offset; i+= 32)
__asm__ volatile ("icbi %1,%0" : : "r" (adjusted_base), "r" (i));
}
}