soc/intel/skylake: Expand USB OC pins definition to support PCH-H

Currently the USB OC pins definition only being defined up to OC3.
For PCH-H, OC4 and OC5 are needed, so add both into OC pin enum.

Changes is being verified and booted to Yocto with Saddle Brook.

Change-Id: Idaed6fa7dcddb9c688966e8bc59f656aec2b26eb
Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com>
Reviewed-on: https://review.coreboot.org/18364
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Teo Boon Tiong 2017-02-14 22:16:58 +08:00 committed by Martin Roth
parent c97e042a9b
commit f296ce91b9
1 changed files with 2 additions and 0 deletions

View File

@ -51,6 +51,8 @@ enum {
OC1,
OC2,
OC3,
OC4,
OC5,
OC_SKIP = 8, /* Skip OC programming */
};