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sb/intel/bd82x6x/acpi: Replace LEqual(a,b) with ASL 2.0 syntax

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Replace `LEqual(a, b)` with `a == b`.

Change-Id: I4e219bea8df64db1d49beb8534f0f37fee0df5b6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60668
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
This commit is contained in:
Felix Singer 2022-01-02 01:23:28 +01:00
parent 644e59b7ba
commit f333a442a3
2 changed files with 5 additions and 5 deletions
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6
src/southbridge/intel/bd82x6x/acpi/lpc.asl
View file

@ -92,15 +92,15 @@ Device (LPCB)
{
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
If (HPAS == 1) {
HPT0 = HPET_BASE_ADDRESS + 0x1000
}
If (Lequal(HPAS, 2)) {
If (HPAS == 2) {
HPT0 = HPET_BASE_ADDRESS + 0x2000
}
If (Lequal(HPAS, 3)) {
If (HPAS == 3) {
HPT0 = HPET_BASE_ADDRESS + 0x3000
}
}

4
src/southbridge/intel/bd82x6x/acpi/pch.asl
View file

@ -247,13 +247,13 @@ Method (_OSC, 4)
* Arg3 - A Buffer containing a list of DWORD capabilities
*/
/* Check for XHCI */
If (LEqual (Arg0, ToUUID("7c9512a9-1705-4cb4-af7d-506a2423ab71")))
If (Arg0 == ToUUID("7c9512a9-1705-4cb4-af7d-506a2423ab71"))
{
Return (^XHC.POSC(Arg2, Arg3))
}
/* Check for PCIe */
If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
{
/* Let OS control everything */
Return (Arg3)