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mb/google/sarien: Fix s5 touchscreen power leakage 

Leakage power is observed from TOUCH_SCREEN_PD# (GPP_E7 which is connected
 to RESET pin of Wacom controller) during S5.
To avoid leakage power, GPP_E7 needs to be turned off before S5 entry.

BUG=b:129899315
TEST=Measure leakage power in S5 from both Arcada and Sarien

Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Change-Id: Ie4229477b7149c0a75f4a8c6c7c453a37cc1c78c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32367
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Roy Mingi Park <roy.mingi.park@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Lijian Zhao 2019-04-19 17:36:46 -07:00 committed by Duncan Laurie
parent 9646cfe989
commit f36fcdf2ab
2 changed files with 8 additions and 0 deletions
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4
src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl
View File

@ -14,6 +14,7 @@
*/
#define CAM_EN GPP_B11 /* Active low */
#define TS_PD GPP_E7
/* Method called from LPIT prior to enter s0ix state */
Method (MS0X, 1)
@ -31,6 +32,9 @@ Method (MS0X, 1)
Method (MPTS, 1)
{
\_SB.PCI0.LPCB.EC0.PTS (Arg0)
/* Clear touch screen pd pin to avoid leakage */
\_SB.PCI0.CTXS (TS_PD)
}
/* Method called from _WAK prior to wakeup */

4
src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl
View File

@ -14,6 +14,7 @@
*/
#define CAM_EN GPP_B11 /* Active low */
#define TS_PD GPP_E7
/* Method called from LPIT prior to enter s0ix state */
Method (MS0X, 1)
@ -31,6 +32,9 @@ Method (MS0X, 1)
Method (MPTS, 1)
{
\_SB.PCI0.LPCB.EC0.PTS (Arg0)
/* Clear touch screen pd pin to avoid leakage */
\_SB.PCI0.CTXS (TS_PD)
}
/* Method called from _WAK prior to wakeup */