soc/intel/apollolake: fix system reset eventlog

The SRS bit which is supposed to indicate reset button press
is non-functional. If it did work the system reset event it
was associated with is overly specific. Therefore, use the
warm reset status bit.

BUG=b:37687843

Change-Id: I34dd09c03d2bca72da9a5cdf23121e0d0e621fa6
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/19484
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Aaron Durbin 2017-04-27 14:14:05 -05:00
parent 9c86aafe5a
commit f39692ee3e
1 changed files with 1 additions and 1 deletions

View File

@ -73,7 +73,7 @@ static void pch_log_power_and_resets(struct chipset_power_state *ps)
elog_add_event(ELOG_TYPE_RTC_RESET);
/* System Reset */
if (ps->gen_pmcon1 & SRS)
if (ps->gen_pmcon1 & WARM_RESET_STS)
elog_add_event(ELOG_TYPE_SYSTEM_RESET);
/* TCO Timeout */