mb/google/kukui: Add LPDDR4X MT53E2G32D4NQ-046 WT:C support
Separate and add LPDDR4X MT53E2G32D4NQ-046 WT:C support for burnet/esche ID#1: MICRON - MT53E2G32D4NQ-046 WT:C BUG=b:225121354 BRANCH=none TEST=1. emerge-jacuzzi coreboot 2. power on test ok Change-Id: If720d7bcf185c5c0149a82125ec068fc75e5b3cd Signed-off-by: Kevin Chiu <kevin.chiu.17802@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64069 Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -90,10 +90,11 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS
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config BOARD_SDRAM_TABLE_OFFSET
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config BOARD_SDRAM_TABLE_OFFSET
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hex
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hex
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default 0x10 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE || BOARD_GOOGLE_FENNEL || BOARD_GOOGLE_CERISE || BOARD_GOOGLE_STERN || BOARD_GOOGLE_MAKOMO || BOARD_GOOGLE_MUNNA
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default 0x10 if BOARD_GOOGLE_FENNEL || BOARD_GOOGLE_CERISE || BOARD_GOOGLE_STERN || BOARD_GOOGLE_MAKOMO || BOARD_GOOGLE_MUNNA
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default 0x20 if BOARD_GOOGLE_KAKADU || BOARD_GOOGLE_KATSU
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default 0x20 if BOARD_GOOGLE_KAKADU || BOARD_GOOGLE_KATSU
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default 0x30 if BOARD_GOOGLE_COZMO || BOARD_GOOGLE_PICO
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default 0x30 if BOARD_GOOGLE_COZMO || BOARD_GOOGLE_PICO
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default 0x40 if BOARD_GOOGLE_KAPPA
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default 0x40 if BOARD_GOOGLE_KAPPA
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default 0x50 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE
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default 0x0
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default 0x0
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config BOARD_OVERRIDE_LCM_ID
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config BOARD_OVERRIDE_LCM_ID
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@ -25,7 +25,7 @@ static const char *const sdram_configs[] = {
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[0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
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[0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
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[0x0b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB",
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[0x0b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB",
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/* Table shared by Burnet and its variants, Fennel and Cerise, offset = 0x10 */
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/* Table shared by Fennel, Cerise, Stern, Makomo, Munna, offset = 0x10 */
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[0x10] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
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[0x10] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
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[0x11] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
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[0x11] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
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[0x12] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
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[0x12] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
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@ -72,6 +72,20 @@ static const char *const sdram_configs[] = {
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[0x49] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
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[0x49] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
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[0x4a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
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[0x4a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
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[0x4b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB",
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[0x4b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB",
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/* Table shared by Burnet and Esche, offset = 0x50 */
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[0x50] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
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[0x51] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
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[0x52] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
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[0x53] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
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[0x54] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
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[0x55] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
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[0x56] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
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[0x57] = "sdram-lpddr4x-MT53E1G32D2NP-046-4GB",
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[0x58] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
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[0x59] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
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[0x5a] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
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[0x5b] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB",
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};
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};
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static struct sdram_params params;
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static struct sdram_params params;
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