soc/amd/common/block/acpimmio/mmio_util: add fch_disable_kb_rst

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Kangheui Won <khwon@chromium.org>
Change-Id: Ie65e39ffb8c353415f5b68e1e0f378d18eeb7498
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51784
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2021-03-25 00:51:39 +01:00
parent c1042ba2c5
commit f4e90e8a61
2 changed files with 6 additions and 0 deletions

View File

@ -93,6 +93,11 @@ void fch_configure_hpet(void)
pm_write32(PM_DECODE_EN, reg); pm_write32(PM_DECODE_EN, reg);
} }
void fch_disable_kb_rst(void)
{
pm_write8(PM_RST_CTRL1, pm_read8(PM_RST_CTRL1) & ~KBRSTEN);
}
/* PM registers are accessed a byte at a time via CD6/CD7 */ /* PM registers are accessed a byte at a time via CD6/CD7 */
uint8_t pm_io_read8(uint8_t reg) uint8_t pm_io_read8(uint8_t reg)
{ {

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@ -87,6 +87,7 @@ void fch_disable_legacy_dma_io(void);
void fch_io_enable_legacy_io(void); void fch_io_enable_legacy_io(void);
void fch_enable_ioapic_decode(void); void fch_enable_ioapic_decode(void);
void fch_configure_hpet(void); void fch_configure_hpet(void);
void fch_disable_kb_rst(void);
/* Access PM registers using IO cycles */ /* Access PM registers using IO cycles */
uint8_t pm_io_read8(uint8_t reg); uint8_t pm_io_read8(uint8_t reg);