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soc/intel/apollolake: Fix broken GNVS offset for chromeos 

Change 03a235(soc/intel/apollolake: Add GNVS variables and include SGX
ASL) added new GNVS variables but did not adjust the unused array size
and thus broke chromeos offset.

This change fixes the above issue by reducing the size of unused array.

BUG=b:68254376
TEST=Verified that chromeos offset is correct. crossystem is able to
read all variables.

Change-Id: I279bfc4c702e46b88c1c7a067a24326ff8fed368
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22177
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Furquan Shaikh 2017-10-25 09:52:53 -07:00 committed by Furquan Shaikh
parent af88398887
commit f5e8fe5d95
1 changed files with 1 additions and 1 deletions
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src/soc/intel/apollolake/include/soc/nvs.h
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@ -47,7 +47,7 @@ typedef struct global_nvs_t {
uint8_t ecps; /* 0x2C - SGX Enabled status */ uint8_t ecps; /* 0x2C - SGX Enabled status */
uint64_t emna; /* 0x2D - 0x34 EPC base address */ uint64_t emna; /* 0x2D - 0x34 EPC base address */
uint64_t elng; /* 0x35 - 0x3C EPC Length */ uint64_t elng; /* 0x35 - 0x3C EPC Length */
uint8_t unused[212]; uint8_t unused[195];
/* ChromeOS specific (0x100 - 0xfff) */ /* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos; chromeos_acpi_t chromeos;