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mb/google/brya/var/kinox: Disable PCH USB2 phy power gating 

The patch disables PCH USB2 Phy power gating to prevent possible display
flicker issue for kinox board. Please refer Intel doc#723158 for more
information.

BUG=b:257373738
TEST=Verify the build for kinox board

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Ifcf4f89ea4c61ec4f9a31edba069d2111ca06010
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69205
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Ricky Chang <rickytlchang@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Dtrain Hsu 2022-11-04 11:57:23 +08:00 committed by Felix Held
parent 9429844f81
commit f5ead3f029
1 changed files with 4 additions and 0 deletions
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src/mainboard/google/brya/variants/kinox/overridetree.cb
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@ -12,6 +12,10 @@ chip soc/intel/alderlake
# GPE configuration # GPE configuration
register "pmc_gpe0_dw1" = "GPP_H" register "pmc_gpe0_dw1" = "GPP_H"
# As per Intel Advisory doc#723158, the change is required to prevent possible
# display flickering issue.
register "usb2_phy_sus_pg_disable" = "1"
# Intel Common SoC Config # Intel Common SoC Config
#+-------------------+---------------------------+ #+-------------------+---------------------------+
#| Field | Value | #| Field | Value |