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soc/samsung/exynos: Sync 'power.c' between chip variants 

Change-Id: I06d83be840b49ee7523b34e1dba5ec038256b3f4
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7918
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Edward O'Callaghan 2014-12-23 23:48:01 +11:00
parent 5b63dc1ff8
commit f679cfe429
2 changed files with 5 additions and 3 deletions
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6
src/soc/samsung/exynos5250/power.c
View File

@ -22,7 +22,9 @@
#include <arch/io.h>
#include <console/console.h>
#include <halt.h>
#include "dmc.h"
#include "power.h"
#include "setup.h"
/* Set the PS-Hold drive value */
static void ps_hold_setup(void)
@ -51,7 +53,7 @@ void power_shutdown(void)
void power_enable_dp_phy(void)
{
setbits_le32(&exynos_power->dptx_phy_control, DPTX_PHY_ENABLE);
setbits_le32(&exynos_power->dptx_phy_control, EXYNOS_DP_PHY_ENABLE);
}
void power_enable_hw_thermal_trip(void)
@ -82,7 +84,7 @@ void power_enable_xclkout(void)
{
/* use xxti for xclk out */
clrsetbits_le32(&exynos_power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK,
PMU_DEBUG_XXTI);
PMU_DEBUG_XXTI);
}
void power_release_uart_retention(void)

2
src/soc/samsung/exynos5250/power.h
View File

@ -34,7 +34,7 @@ void power_enable_hw_thermal_trip(void);
#define POWER_PS_HOLD_CONTROL_DATA_HIGH (1 << 8)
#define POWER_ENABLE_HW_TRIP (1UL << 31)
#define DPTX_PHY_ENABLE (1 << 0)
#define EXYNOS_DP_PHY_ENABLE (1 << 0)
/* PMU_DEBUG bits [12:8] = 0x1000 selects XXTI clock source */
#define PMU_DEBUG_XXTI 0x1000