nb/intel/*/gma: Port ACPI opregion to older platforms
Port the ACPI opregion implementation that resides in drivers/intel/gma to older platforms. It allows to include a vbt.bin and allows GNU/Linux to load the opregion as ASLS is being set. Windows' Intel will likely ignore it as it relies on legacy VBIOS to be loaded at 0xc0000. Tested successfully on DG43GT (x4x) with vbt.bin, with X200 (gm45) with vendor option rom and D945GCLF (i945) with fake vbt. Change-Id: I1896411155592b343e48cbd116e2f70fb0dbfafa Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/21766 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Patrick Rudolph
parent
53e4195625
commit
f6aa7d94c8
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@ -25,6 +25,8 @@
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#include <cpu/x86/msr.h>
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#include <cpu/x86/mtrr.h>
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#include <commonlib/helpers.h>
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#include <cbmem.h>
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#include <southbridge/intel/i82801ix/nvs.h>
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#include "drivers/intel/gma/i915_reg.h"
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#include "chip.h"
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@ -32,6 +34,7 @@
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#include <drivers/intel/gma/intel_bios.h>
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#include <drivers/intel/gma/edid.h>
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#include <drivers/intel/gma/i915.h>
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#include <drivers/intel/gma/opregion.h>
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#include <pc80/vga.h>
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#include <pc80/vga_io.h>
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@ -49,6 +52,19 @@ void gtt_write(u32 reg, u32 data)
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write32(res2mmio(gtt_res, reg, 0), data);
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}
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uintptr_t gma_get_gnvs_aslb(const void *gnvs)
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{
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const global_nvs_t *gnvs_ptr = gnvs;
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return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0);
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}
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void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)
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{
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global_nvs_t *gnvs_ptr = gnvs;
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if (gnvs_ptr)
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gnvs_ptr->aslb = aslb;
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}
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static void gma_init_lvds(const struct northbridge_intel_gm45_config *info,
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u8 *mmio, u32 physbase, u16 piobase, u32 lfb,
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struct edid *edid)
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@ -758,6 +774,8 @@ static void gma_func0_init(struct device *dev)
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if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT))
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gma_ngi(dev, &edid_lvds);
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intel_gma_restore_opregion();
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}
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static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
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@ -793,6 +811,37 @@ static void gma_ssdt(device_t device)
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drivers_intel_gma_displays_ssdt_generate(gfx);
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}
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static unsigned long
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gma_write_acpi_tables(struct device *const dev,
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unsigned long current,
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struct acpi_rsdp *const rsdp)
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{
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igd_opregion_t *opregion = (igd_opregion_t *)current;
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global_nvs_t *gnvs;
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if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
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return current;
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current += sizeof(igd_opregion_t);
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/* GNVS has been already set up */
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gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
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if (gnvs) {
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/* IGD OpRegion Base Address */
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gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion);
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} else {
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printk(BIOS_ERR, "Error: GNVS table not found.\n");
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}
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current = acpi_align_current(current);
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return current;
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}
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static const char *gma_acpi_name(const struct device *dev)
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{
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return "GFX0";
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}
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static struct pci_operations gma_pci_ops = {
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.set_subsystem = gma_set_subsystem,
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};
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@ -806,6 +855,8 @@ static struct device_operations gma_func0_ops = {
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.scan_bus = 0,
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.enable = 0,
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.ops_pci = &gma_pci_ops,
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.acpi_name = gma_acpi_name,
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.write_acpi_tables = gma_write_acpi_tables,
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};
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static const unsigned short pci_device_ids[] =
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@ -23,10 +23,13 @@
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#include <edid.h>
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#include <drivers/intel/gma/edid.h>
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#include <drivers/intel/gma/i915.h>
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#include <drivers/intel/gma/opregion.h>
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#include <string.h>
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#include <pc80/vga.h>
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#include <pc80/vga_io.h>
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#include <commonlib/helpers.h>
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#include <cbmem.h>
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#include <southbridge/intel/i82801gx/nvs.h>
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#include "i945.h"
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#include "chip.h"
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@ -49,6 +52,19 @@
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#define DEFAULT_BLC_PWM 180
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uintptr_t gma_get_gnvs_aslb(const void *gnvs)
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{
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const global_nvs_t *gnvs_ptr = gnvs;
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return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0);
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}
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void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)
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{
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global_nvs_t *gnvs_ptr = gnvs;
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if (gnvs_ptr)
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gnvs_ptr->aslb = aslb;
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}
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static int gtt_setup(u8 *mmiobase)
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{
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unsigned long PGETBL_save;
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@ -687,6 +703,8 @@ static void gma_func0_init(struct device *dev)
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/* PCI Init, will run VBIOS */
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pci_dev_init(dev);
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}
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intel_gma_restore_opregion();
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}
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/* This doesn't reclaim stolen UMA memory, but IGD could still
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@ -767,6 +785,37 @@ static void gma_func0_read_resources(device_t dev)
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pci_dev_read_resources(dev);
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}
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static unsigned long
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gma_write_acpi_tables(struct device *const dev,
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unsigned long current,
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struct acpi_rsdp *const rsdp)
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{
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igd_opregion_t *opregion = (igd_opregion_t *)current;
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global_nvs_t *gnvs;
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if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
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return current;
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current += sizeof(igd_opregion_t);
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/* GNVS has been already set up */
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gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
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if (gnvs) {
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/* IGD OpRegion Base Address */
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gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion);
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} else {
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printk(BIOS_ERR, "Error: GNVS table not found.\n");
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}
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current = acpi_align_current(current);
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return current;
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}
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static const char *gma_acpi_name(const struct device *dev)
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{
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return "GFX0";
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}
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static struct pci_operations gma_pci_ops = {
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.set_subsystem = gma_set_subsystem,
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};
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@ -781,6 +830,8 @@ static struct device_operations gma_func0_ops = {
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.enable = 0,
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.disable = gma_func0_disable,
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.ops_pci = &gma_pci_ops,
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.acpi_name = gma_acpi_name,
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.write_acpi_tables = gma_write_acpi_tables,
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};
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@ -26,6 +26,7 @@
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#include <cpu/x86/msr.h>
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#include <cpu/x86/mtrr.h>
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#include <commonlib/helpers.h>
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#include <cbmem.h>
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#include "drivers/intel/gma/i915_reg.h"
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#include "chip.h"
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@ -33,11 +34,31 @@
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#include <drivers/intel/gma/intel_bios.h>
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#include <drivers/intel/gma/edid.h>
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#include <drivers/intel/gma/i915.h>
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#include <drivers/intel/gma/opregion.h>
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#include <pc80/vga.h>
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#include <pc80/vga_io.h>
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#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801JX)
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#include <southbridge/intel/i82801jx/nvs.h>
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#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX)
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#include <southbridge/intel/i82801gx/nvs.h>
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#endif
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#define BASE_FREQUENCY 96000
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uintptr_t gma_get_gnvs_aslb(const void *gnvs)
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{
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const global_nvs_t *gnvs_ptr = gnvs;
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return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0);
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}
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void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)
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{
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global_nvs_t *gnvs_ptr = gnvs;
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if (gnvs_ptr)
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gnvs_ptr->aslb = aslb;
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}
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static u8 edid_is_present(u8 *edid, u32 edid_size)
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{
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u32 i;
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@ -395,6 +416,8 @@ static void gma_func0_init(struct device *dev)
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} else {
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pci_dev_init(dev);
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}
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intel_gma_restore_opregion();
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}
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static void gma_func0_disable(struct device *dev)
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@ -439,6 +462,37 @@ static void gma_ssdt(device_t device)
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drivers_intel_gma_displays_ssdt_generate(gfx);
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}
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static unsigned long
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gma_write_acpi_tables(struct device *const dev,
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unsigned long current,
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struct acpi_rsdp *const rsdp)
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{
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igd_opregion_t *opregion = (igd_opregion_t *)current;
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global_nvs_t *gnvs;
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if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
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return current;
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current += sizeof(igd_opregion_t);
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/* GNVS has been already set up */
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gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
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if (gnvs) {
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/* IGD OpRegion Base Address */
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gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion);
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} else {
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printk(BIOS_ERR, "Error: GNVS table not found.\n");
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}
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current = acpi_align_current(current);
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return current;
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}
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static const char *gma_acpi_name(const struct device *dev)
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{
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return "GFX0";
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}
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static struct pci_operations gma_pci_ops = {
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.set_subsystem = gma_set_subsystem,
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};
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@ -451,6 +505,8 @@ static struct device_operations gma_func0_ops = {
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.init = gma_func0_init,
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.ops_pci = &gma_pci_ops,
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.disable = gma_func0_disable,
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.acpi_name = gma_acpi_name,
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.write_acpi_tables = gma_write_acpi_tables,
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};
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static const unsigned short pci_device_ids[] = {
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