mb/google/mancomb: Add eSPI GPIO back to init table
GPIOs should be configured in ramstage even if they are configured in an earlier stage. BUG=b:182211161 TEST=builds Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I07d5c46d6ea6dc2bc9ab265d0c01772d653884cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/52123 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
parent
c979dd1e00
commit
f7c7d7c25d
1 changed files with 8 additions and 1 deletions
|
@ -108,7 +108,14 @@ static const struct soc_amd_gpio base_gpio_table[] = {
|
|||
/* CLK_REQ0_L */
|
||||
PAD_NF(GPIO_92, CLK_REQ0_L, PULL_NONE),
|
||||
/* GPIO_93 - GPIO_103: Not available */
|
||||
/* GPIO_104 - GPIO_108: eSPI configured in early stage */
|
||||
/* ESPI1_DATA0 */
|
||||
PAD_NF(GPIO_104, SPI2_DO_ESPI2_D0, PULL_NONE),
|
||||
/* ESPI1_DATA1 */
|
||||
PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE),
|
||||
/* ESPI1_DATA2 */
|
||||
PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE),
|
||||
/* ESPI1_DATA3 */
|
||||
PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
|
||||
/* EGPIO109 */
|
||||
PAD_NC(GPIO_109),
|
||||
/* GPIO_110 - GPIO_112: Not available */
|
||||
|
|
Loading…
Reference in a new issue