AGESA boards: Clean up some includes

Change-Id: I84c70aa04ab556a3898d3525f7b9aab85812f61d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/mainboard/amd/dinar/mainboard.c

@@ -15,11 +15,7 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
+
 #include <NbPlatform.h>
 
 //#define SMBUS_IO_BASE 0x6000

src/mainboard/amd/inagua/mainboard.c

@@ -15,11 +15,7 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
+
 #include <southbridge/amd/sb800/sb800.h>
 #include "SBPLATFORM.h" 	/* Platfrom Specific Definitions */
 

src/mainboard/amd/olivehill/mainboard.c

@@ -15,14 +15,6 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
-#include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <northbridge/amd/agesa/state_machine.h>
 
 /**********************************************
  * enable the dedicated function in mainboard.

src/mainboard/amd/parmer/mainboard.c

@@ -15,15 +15,6 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
-#include <arch/acpi.h>
-#include <cpu/amd/agesa/s3_resume.h>
-#include <northbridge/amd/agesa/state_machine.h>
 
 /*************************************************
  * enable the dedicated function in parmer board.

src/mainboard/amd/persimmon/mainboard.c

@@ -16,15 +16,10 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
 #include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <device/pci_def.h>
+
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <southbridge/amd/cimx/cimx_util.h>
-#include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <cpu/amd/mtrr.h>
 #include "SBPLATFORM.h"
 #include <southbridge/amd/cimx/sb800/pci_devs.h>
 #include <northbridge/amd/agesa/family14/pci_devs.h>

src/mainboard/amd/south_station/mainboard.c

@@ -14,14 +14,10 @@
  */
 
 #include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <southbridge/amd/sb800/sb800.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
 #include <delay.h>
+#include <device/device.h>
+
+#include <southbridge/amd/sb800/sb800.h>
 #include "SBPLATFORM.h" 	/* Platfrom Specific Definitions */
 
 

src/mainboard/amd/thatcher/mainboard.c

@@ -15,15 +15,7 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
 #include <cpu/x86/msr.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
-#include <arch/acpi.h>
-#include <cpu/amd/agesa/s3_resume.h>
-#include <northbridge/amd/agesa/state_machine.h>
 
 /*************************************************
  * enable the dedicated function in thatcher board.

src/mainboard/amd/torpedo/mainboard.c

@@ -15,11 +15,6 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
 
 #define ONE_MB  0x100000
 //#define SMBUS_IO_BASE 0x6000

src/mainboard/amd/union_station/mainboard.c

@@ -15,12 +15,8 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <device/pci_def.h>
+
 #include <southbridge/amd/sb800/sb800.h>
-#include <cpu/amd/mtrr.h>
 #include "SBPLATFORM.h" 	/* Platfrom Specific Definitions */
 
 void set_pcie_reset(void);

src/mainboard/asrock/e350m1/mainboard.c

@@ -15,11 +15,8 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
 #include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
+
 #include <southbridge/amd/cimx/cimx_util.h>
 #include "SBPLATFORM.h"
 

src/mainboard/asrock/imb-a180/mainboard.c

@@ -15,14 +15,6 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
-#include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <northbridge/amd/agesa/state_machine.h>
 
 /**********************************************
  * enable the dedicated function in mainboard.

src/mainboard/asus/f2a85-m/mainboard.c

@@ -13,16 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#include <northbridge/amd/agesa/state_machine.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-
-#include <arch/acpi.h>
-#include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_def.h>
 
 /*************************************************
  * enable the dedicated function in thatcher board.

src/mainboard/bap/ode_e20XX/mainboard.c

@@ -17,18 +17,11 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
-#include <arch/acpi.h>
+
 #include <southbridge/amd/agesa/hudson/pci_devs.h>
 #include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h>
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <northbridge/amd/agesa/family16kb/pci_devs.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <northbridge/amd/agesa/state_machine.h>
 
 /***********************************************************
  * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.

src/mainboard/biostar/am1ml/mainboard.c

@@ -18,14 +18,6 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
-#include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <northbridge/amd/agesa/state_machine.h>
 #include <southbridge/amd/agesa/hudson/pci_devs.h>
 #include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h>
 #include <southbridge/amd/common/amd_pci_util.h>

src/mainboard/elmex/pcm205400/mainboard.c

@@ -16,15 +16,9 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
 #include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <device/pci_def.h>
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <southbridge/amd/cimx/cimx_util.h>
-#include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <cpu/amd/mtrr.h>
 #include "SBPLATFORM.h"
 #include <southbridge/amd/cimx/sb800/pci_devs.h>
 #include <northbridge/amd/agesa/family14/pci_devs.h>

src/mainboard/gizmosphere/gizmo/mainboard.c

@@ -14,18 +14,14 @@
  * GNU General Public License for more details.
  */
 
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
 #include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <device/pci_def.h>
-#include <southbridge/amd/sb800/sb800.h>
-#include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <cpu/amd/mtrr.h>
-#include "SBPLATFORM.h"
+#include <console/console.h>
 #include <delay.h>
+#include <device/device.h>
+#include <device/pci_def.h>
+
+#include <southbridge/amd/sb800/sb800.h>
+#include "SBPLATFORM.h"
 
 void set_pcie_reset(void);
 void set_pcie_dereset(void);

src/mainboard/gizmosphere/gizmo2/mainboard.c

@@ -17,18 +17,10 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
-#include <arch/acpi.h>
 #include <southbridge/amd/agesa/hudson/pci_devs.h>
 #include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h>
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <northbridge/amd/agesa/family16kb/pci_devs.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <northbridge/amd/agesa/state_machine.h>
 
 /***********************************************************
  * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.

src/mainboard/hp/abm/mainboard.c

@@ -16,11 +16,7 @@
 
 #include <console/console.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <northbridge/amd/agesa/state_machine.h>
+
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <southbridge/amd/agesa/hudson/pci_devs.h>
 #include <northbridge/amd/agesa/family16kb/pci_devs.h>

src/mainboard/hp/pavilion_m6_1035dx/mainboard.c

@@ -13,21 +13,15 @@
  * GNU General Public License for more details.
  */
 
-#include <northbridge/amd/agesa/state_machine.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
 #include "ec.h"
 
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <console/console.h>
-#include <cpu/x86/msr.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_def.h>
 
 #include <southbridge/amd/agesa/hudson/smi.h>
 
-
 static void pavilion_cold_boot_init(void)
 {
 	/* Lid SMI is only used in non-ACPI mode; leave it off in S3 resume */

src/mainboard/jetway/nf81-t56n-lf/mainboard.c

@@ -15,15 +15,10 @@
  * GNU General Public License for more details.
  */
 
-#include <northbridge/amd/agesa/BiosCallOuts.h>
 
-#include <arch/acpi.h>
 #include <arch/io.h>
 #include <console/console.h>
-#include <cpu/x86/msr.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_def.h>
 
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <southbridge/amd/cimx/sb800/SBPLATFORM.h>

src/mainboard/lenovo/g505s/mainboard.c

@@ -13,21 +13,14 @@
  * GNU General Public License for more details.
  */
 
-#include <northbridge/amd/agesa/state_machine.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
 #include "ec.h"
 
 #include <arch/acpi.h>
-#include <arch/io.h>
 #include <console/console.h>
-#include <cpu/x86/msr.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_def.h>
 
 #include <southbridge/amd/agesa/hudson/smi.h>
 
-
 static void pavilion_cold_boot_init(void)
 {
 	/* Lid SMI is only used in non-ACPI mode; leave it off in S3 resume */

src/mainboard/lippert/frontrunner-af/mainboard.c

@@ -18,12 +18,9 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <arch/io.h>
-#include <cpu/x86/msr.h>
 #include <device/pci_def.h>
 #include <southbridge/amd/sb800/sb800.h>
 #include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <cpu/amd/mtrr.h>
 #include "SBPLATFORM.h"
 #include "OEM.h" /* SMBUS0_BASE_ADDRESS */
 #include <southbridge/amd/cimx/sb800/gpio_oem.h>

src/mainboard/lippert/toucan-af/mainboard.c

@@ -18,12 +18,9 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <arch/io.h>
-#include <cpu/x86/msr.h>
 #include <device/pci_def.h>
 #include <southbridge/amd/sb800/sb800.h>
 #include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <cpu/amd/mtrr.h>
 #include "SBPLATFORM.h"
 #include "OEM.h" /* SMBUS0_BASE_ADDRESS */
 #include <southbridge/amd/cimx/sb800/gpio_oem.h>

src/mainboard/msi/ms7721/mainboard.c

@@ -13,16 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#include <northbridge/amd/agesa/state_machine.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-
-#include <arch/acpi.h>
-#include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_def.h>
 
 /*************************************************
  * enable the dedicated function in thatcher board.

src/mainboard/pcengines/apu1/mainboard.c

@@ -18,13 +18,10 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <arch/io.h>
-#include <cpu/x86/msr.h>
 #include <device/pci_def.h>
 #include <southbridge/amd/common/amd_pci_util.h>
 #include <southbridge/amd/cimx/cimx_util.h>
 #include <arch/acpi.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <cpu/amd/mtrr.h>
 #include <smbios.h>
 #include <string.h>
 #include "SBPLATFORM.h"

src/mainboard/pcengines/apu2/acpi_tables.c

@@ -20,8 +20,6 @@
 #include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdfam16.h>
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/pcengines/apu2/mainboard.c

@@ -27,8 +27,6 @@
 #include <superio/nuvoton/nct5104d/nct5104d.h>
 #include <smbios.h>
 #include <string.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
 #include "gpio_ftns.h"
 
 #define SPD_SIZE  128

src/mainboard/supermicro/h8qgi/mainboard.c

@@ -17,8 +17,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
 #include <device/pci_def.h>
 #include <NbPlatform.h>
 

src/mainboard/supermicro/h8scm/mainboard.c

@@ -18,8 +18,6 @@
 #include <device/pci.h>
 #include <arch/io.h>
 #include <boot/tables.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
 #include <device/pci_def.h>
 #include <NbPlatform.h>
 #include "chip.h"

src/mainboard/tyan/s8226/mainboard.c

@@ -18,8 +18,6 @@
 #include <device/pci.h>
 #include <arch/io.h>
 #include <boot/tables.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
 #include <device/pci_def.h>
 #include <NbPlatform.h>
 #include "chip.h"

src/northbridge/amd/agesa/family14/pci_devs.h

@@ -16,6 +16,8 @@
 #ifndef _AMD_FAM14_PCI_DEVS_H_
 #define _AMD_FAM14_PCI_DEVS_H_
 
+#include <device/pci_def.h>
+
 #define BUS0 0
 
 /* Graphics and Display */

src/northbridge/amd/agesa/family15tn/pci_devs.h

@@ -16,6 +16,8 @@
 #ifndef _AMD_FAM15TN_PCI_DEVS_H_
 #define _AMD_FAM15TN_PCI_DEVS_H_
 
+#include <device/pci_def.h>
+
 #define BUS0 0
 
 /* Graphics and Display */

src/northbridge/amd/agesa/family16kb/pci_devs.h

@@ -16,6 +16,8 @@
 #ifndef _AMD_FAM16KB_PCI_DEVS_H_
 #define _AMD_FAM16KB_PCI_DEVS_H_
 
+#include <device/pci_def.h>
+
 #define BUS0 0
 
 /* Graphics and Display */

src/southbridge/amd/agesa/hudson/pci_devs.h

@@ -16,6 +16,8 @@
 #ifndef _AGESA_HUDSON_PCI_DEVS_H_
 #define _AGESA_HUDSON_PCI_DEVS_H_
 
+#include <device/pci_def.h>
+
 #define BUS0 0
 
 /* XHCI */

src/southbridge/amd/cimx/sb800/pci_devs.h

@@ -16,6 +16,8 @@
 #ifndef _CIMX_SB800_PCI_DEVS_H_
 #define _CIMX_SB800_PCI_DEVS_H_
 
+#include <device/pci_def.h>
+
 #define BUS0 0
 
 /* SATA */