riscv: Use correct argument in a1 when invoking payload

Fix a bug introduced by:
820dcfceb3
riscv: Simplify payload handling

Put fdt into a1 correctly.

Change-Id: I0dea7b88fde9d9a7365cb366917747d8110b9159
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/31287
Reviewed-by: ron minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Philipp Hug 2019-02-08 13:28:33 +01:00 committed by ron minnich
parent 98ce3f8dad
commit f813b84486
1 changed files with 1 additions and 1 deletions

View File

@ -44,7 +44,7 @@ void run_payload(struct prog *prog, void *fdt, int payload_mode)
write_csr(mepc, doit);
asm volatile(
"mv a0, %0\n\t"
"mv a1, %0\n\t"
"mv a1, %1\n\t"
"mret" ::"r"(hart_id),
"r"(fdt)
: "a0", "a1");