soc/intel/apollolake/bootblock: Clear the GPI IS & IE registers
Clear the GPI Interrupt Status & Enable registers to prevent any interrupt storms due to GPI. BUG=b:130593883 BRANCH=octopus TEST=Ensure that the Interrupt status & enable registers are reset during the boot up when the system is brought out of G3, S5 & S3. Ensure that the system boots fine to ChromeOS. Change-Id: Ia3b9d3bf08472219348e20b53bae470c589039fb Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32448 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -122,3 +122,12 @@ void bootblock_soc_early_init(void)
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paging_enable_for_car("pdpt", "pt");
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}
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}
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void bootblock_soc_init(void)
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{
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/*
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* Clear the GPI interrupt enable & status registers to avoid any
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* interrupt storm during the kernel bootup.
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*/
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gpi_clear_int_cfg();
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}
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