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soc/intel/broadwell/pch: Use equivalent Lynx Point ASL 

Keep deduplicating code. Have Broadwell PCH ASL borrow some equivalent
Lynx Point ASL files, and drop the now-unused files from Broadwell PCH.

Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.

Change-Id: If5a8712a846bbf7c42db92167763935dee74c26f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2021-06-14 11:12:33 +02:00 committed by Patrick Georgi
parent d9cf794df4
commit f8ceb882b9
4 changed files with 5 additions and 54 deletions
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11
src/soc/intel/broadwell/pch/acpi/audio.asl
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@ -1,11 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Intel PCH HDA */
// Intel High Definition Audio (Azalia) 0:1b.0
Device (HDEF)
{
Name (_ADR, 0x001b0000)
Name (_PRW, Package () { 0x6d, 3 })
}

33
src/soc/intel/broadwell/pch/acpi/ehci.asl
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@ -1,33 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
// EHCI Controller 0:1d.0
Device (EHCI)
{
Name (_ADR, 0x001d0000)
Name (_PRW, Package(){ 0x6d, 3 })
// Leave USB ports on for to allow Wake from USB
Method (_S3D, 0) // Highest D State in S3 State
{
Return (2)
}
Method (_S4D, 0) // Highest D State in S4 State
{
Return (2)
}
Device (HUB7)
{
Name (_ADR, 0)
Device (PRT1) { Name (_ADR, 1) } // USB Port 0
Device (PRT2) { Name (_ADR, 2) } // USB Port 1
Device (PRT3) { Name (_ADR, 3) } // USB Port 2
Device (PRT4) { Name (_ADR, 4) } // USB Port 3
Device (PRT5) { Name (_ADR, 5) } // USB Port 4
Device (PRT6) { Name (_ADR, 6) } // USB Port 5
}
}

8
src/soc/intel/broadwell/pch/acpi/pch.asl
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@ -5,6 +5,8 @@
/* PCI IRQ assignment */
#include "pci_irqs.asl"
#define DEFAULT_PRW_VALUE 0x6d
Scope (\)
{
// IO-Trap at 0x800. This is the ACPI->SMI communication interface.
@ -42,7 +44,7 @@ Scope (\)
}
// High Definition Audio (Azalia) 0:1b.0
#include "audio.asl"
#include <southbridge/intel/lynxpoint/acpi/audio.asl>
// ADSP/SST 0:13.0
#include "adsp.asl"
@ -51,7 +53,7 @@ Scope (\)
#include <southbridge/intel/common/acpi/pcie.asl>
// USB EHCI 0:1d.0
#include "ehci.asl"
#include <southbridge/intel/lynxpoint/acpi/ehci.asl>
// USB XHCI 0:14.0
#include "xhci.asl"
@ -60,7 +62,7 @@ Scope (\)
#include "lpc.asl"
// SATA 0:1f.2
#include "sata.asl"
#include <southbridge/intel/lynxpoint/acpi/sata.asl>
// SMBus 0:1f.3
#include <southbridge/intel/common/acpi/smbus.asl>

7
src/soc/intel/broadwell/pch/acpi/sata.asl
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@ -1,7 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
// Intel SATA Controller 0:1f.2
Device (SATA)
{
Name (_ADR, 0x001f0002)
}