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mb/google/guybrush/bootblock: add comment on selecting eSPI interface 

Setting the PM_ESPI_CS_USE_DATA2 bit in PM_SPI_PAD_PU_PD results in the
eSPI transactions being sent via the SPI2 pins instead of the SPI1 pins.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iad8e3a48496a52c14c936ab77c75dc1b403f47bb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2021-11-03 05:20:53 +01:00
parent 26806aed5c
commit f9014bbb60
1 changed files with 1 additions and 0 deletions
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src/mainboard/google/guybrush/bootblock.c
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@ -63,6 +63,7 @@ void bootblock_mainboard_early_init(void)
/* Early eSPI interface configuration */ /* Early eSPI interface configuration */
/* Use SPI2 pins for eSPI */
dword = pm_read32(PM_SPI_PAD_PU_PD); dword = pm_read32(PM_SPI_PAD_PU_PD);
dword |= PM_ESPI_CS_USE_DATA2; dword |= PM_ESPI_CS_USE_DATA2;
pm_write32(PM_SPI_PAD_PU_PD, dword); pm_write32(PM_SPI_PAD_PU_PD, dword);