nb/intel/gm45: Remove apic 0 from devicetree
This is added at runtime. Change-Id: Ife2865f91e3d046bc66e423b2054f56176f57fc6 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69300 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -10,12 +10,7 @@ chip northbridge/intel/gm45
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register "slfm" = "1"
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device cpu_cluster 0 on
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ops gm45_cpu_bus_ops
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chip cpu/intel/socket_p
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device lapic 0 on end
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end
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end
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device cpu_cluster 0 on ops gm45_cpu_bus_ops end
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register "pci_mmio_size" = "2048"
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@ -10,12 +10,7 @@ chip northbridge/intel/gm45
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register "slfm" = "1"
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device cpu_cluster 0 on
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ops gm45_cpu_bus_ops
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chip cpu/intel/socket_BGA956
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device lapic 0 on end
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end
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end
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device cpu_cluster 0 on ops gm45_cpu_bus_ops end
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register "pci_mmio_size" = "2048"
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@ -2,12 +2,7 @@ chip northbridge/intel/gm45
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# IGD Displays
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register "gfx" = "GMA_STATIC_DISPLAYS(0)"
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register "slfm" = "1"
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device cpu_cluster 0 on
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ops gm45_cpu_bus_ops
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chip cpu/intel/socket_BGA956
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device lapic 0 on end
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end
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end
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device cpu_cluster 0 on ops gm45_cpu_bus_ops end
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register "pci_mmio_size" = "2048"
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