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nb/intel/gm45: Remove apic 0 from devicetree 

This is added at runtime.

Change-Id: Ife2865f91e3d046bc66e423b2054f56176f57fc6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69300
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2022-11-07 11:53:23 +01:00 committed by Felix Held
parent 31ba9356b8
commit f9679c4287
3 changed files with 3 additions and 18 deletions
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7
src/mainboard/lenovo/t400/devicetree.cb
View File

@ -10,12 +10,7 @@ chip northbridge/intel/gm45
register "slfm" = "1" register "slfm" = "1"
device cpu_cluster 0 on device cpu_cluster 0 on ops gm45_cpu_bus_ops end
ops gm45_cpu_bus_ops
chip cpu/intel/socket_p
device lapic 0 on end
end
end
register "pci_mmio_size" = "2048" register "pci_mmio_size" = "2048"

7
src/mainboard/lenovo/x200/devicetree.cb
View File

@ -10,12 +10,7 @@ chip northbridge/intel/gm45
register "slfm" = "1" register "slfm" = "1"
device cpu_cluster 0 on device cpu_cluster 0 on ops gm45_cpu_bus_ops end
ops gm45_cpu_bus_ops
chip cpu/intel/socket_BGA956
device lapic 0 on end
end
end
register "pci_mmio_size" = "2048" register "pci_mmio_size" = "2048"

7
src/mainboard/roda/rk9/devicetree.cb
View File

@ -2,12 +2,7 @@ chip northbridge/intel/gm45
# IGD Displays # IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)" register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "slfm" = "1" register "slfm" = "1"
device cpu_cluster 0 on device cpu_cluster 0 on ops gm45_cpu_bus_ops end
ops gm45_cpu_bus_ops
chip cpu/intel/socket_BGA956
device lapic 0 on end
end
end
register "pci_mmio_size" = "2048" register "pci_mmio_size" = "2048"