mainboard/msi/ms9185: Fix coding style and remove commented code
Change-Id: I3cca4adbf04edfd88a9b8ae52cf4d62d429e6c45 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/23536 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -54,7 +54,7 @@ static void *smp_write_config_table(void *v)
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{
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device_t dev = 0;
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struct resource *res;
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for(i = 0; i < 3; i++) {
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for (i = 0; i < 3; i++) {
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dev = dev_find_device(0x1166, 0x0235, dev);
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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@ -72,17 +72,19 @@ static void *smp_write_config_table(void *v)
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//IDE
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outb(0x02, 0xc00); outb(0x0e, 0xc01);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_bcm5785_0, ((1+sysconf.sbdn)<<2)|1, m->apicid_bcm5785[0], 0xe); // IDE
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
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m->bus_bcm5785_0, ((1+sysconf.sbdn)<<2)|1, m->apicid_bcm5785[0], 0xe); // IDE
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//SATA
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outb(0x07, 0xc00); outb(0x0f, 0xc01);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1, (0x0e << 2)|0, m->apicid_bcm5785[0], 0xf);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5785_1, (0x0e << 2)|0, m->apicid_bcm5785[0], 0xf);
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//USB
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outb(0x01, 0xc00); outb(0x0a, 0xc01);
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for(i = 0; i < 3; i++) {
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, m->apicid_bcm5785[0], 0xa); //
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}
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for (i = 0; i < 3; i++)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, m->apicid_bcm5785[0], 0xa); //
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@ -91,7 +93,7 @@ static void *smp_write_config_table(void *v)
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{
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device_t dev;
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dev = dev_find_device(0x1166, 0x0205, 0);
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if(dev) {
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if (dev) {
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uint32_t dword;
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dword = pci_read_config32(dev, 0x6c);
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dword |= (1 << 4); // enable interrupts
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@ -101,46 +103,47 @@ static void *smp_write_config_table(void *v)
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//First pci-x slot (on bcm5785) under bus_bcm5785_1:d.0
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// AIC 8130 Galileo Technology...
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for(i = 0; i < 4; i++) {
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1_1, (6 << 2)|i, m->apicid_bcm5785[1], 2 + (1+i)%4); //
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}
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for (i = 0; i < 4; i++)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5785_1_1, (6 << 2)|i, m->apicid_bcm5785[1], 2 + (1+i)%4); //
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//pci slot (on bcm5785)
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for(i = 0; i < 4; i++) {
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (5 << 2)|i, m->apicid_bcm5785[1], 8+i%4); //
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}
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for (i = 0; i < 4; i++)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5785_0, (5 << 2)|i, m->apicid_bcm5785[1], 8+i%4); //
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//onboard ati
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (4 << 2)|0, m->apicid_bcm5785[1], 0x1);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5785_0, (4 << 2)|0, m->apicid_bcm5785[1], 0x1);
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//PCI-X on bcm5780
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for(i = 0; i < 4; i++) {
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[1], (4 << 2)|i, m->apicid_bcm5785[1], 2 + (0+i)%4); //
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}
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for (i = 0; i < 4; i++)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5780[1], (4 << 2)|i, m->apicid_bcm5785[1], 2 + (0+i)%4); //
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//onboard Broadcom
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for(i = 0; i < 2; i++) {
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[2], (4 << 2)|i, m->apicid_bcm5785[1], 0xa + (0+i)%4); //
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}
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for (i = 0; i < 2; i++)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5780[2], (4 << 2)|i, m->apicid_bcm5785[1], 0xa + (0+i)%4); //
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// First PCI-E x8
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for(i = 0; i < 4; i++) {
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[5], (0 << 2)|i, m->apicid_bcm5785[1], 0xe); //
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}
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for (i = 0; i < 4; i++)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5780[5], (0 << 2)|i, m->apicid_bcm5785[1], 0xe); //
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// Second PCI-E x8
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for(i = 0; i < 4; i++) {
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[3], (0 << 2)|i, m->apicid_bcm5785[1], 0xc); //
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}
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for (i = 0; i < 4; i++)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5780[3], (0 << 2)|i, m->apicid_bcm5785[1], 0xc); //
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// Third PCI-E x1
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for(i = 0; i < 4; i++) {
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[4], (0 << 2)|i, m->apicid_bcm5785[1], 0xd); //
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}
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for (i = 0; i < 4; i++)
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
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m->bus_bcm5780[4], (0 << 2)|i, m->apicid_bcm5785[1], 0xd); //
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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mptable_lintsrc(mc, bus_isa);
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@ -106,18 +106,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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pc87417_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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console_init();
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// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
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/* Halt if there was a built in self test failure */
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report_bist_failure(bist);
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printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
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setup_ms9185_resource_map();
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#if 0
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dump_pci_device(PCI_DEV(0, 0x18, 0));
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dump_pci_device(PCI_DEV(0, 0x19, 0));
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#endif
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printk(BIOS_DEBUG, "bsp_apicid=%02x\n", bsp_apicid);
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@ -139,12 +133,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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bcm5785_early_setup();
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#if 0
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//it your CPU min fid is 1G, you can change HT to 1G and FID to max one time.
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needs_reset = optimize_link_coherent_ht();
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needs_reset |= optimize_link_incoherent_ht(sysinfo);
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#endif
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#if IS_ENABLED(CONFIG_SET_FIDVID)
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{
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msr_t msr;
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@ -179,27 +167,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
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enable_smbus();
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#if 0
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int i;
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for(i = 0; i < 2; i++) {
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activate_spd_rom(sysinfo->ctrl+i);
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dump_smbus_registers();
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}
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#endif
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//do we need apci timer, tsc...., only debug need it for better output
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/* all ap stopped? */
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// init_timer(); // Need to use TMICT to synchronize FID/VID
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sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
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#if 0
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print_pci_devices();
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#endif
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#if 0
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// dump_pci_devices();
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dump_pci_device_index_wait(PCI_DEV(0, 0x18, 2), 0x98);
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dump_pci_device_index_wait(PCI_DEV(0, 0x19, 2), 0x98);
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#endif
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}
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