nb/intel: Use get_int_option()
Change-Id: I8896531d6df729709456bc6e79e02136d9ea7b3b Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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@ -116,11 +116,11 @@ void igd_compute_ggc(sysinfo_t *const sysinfo)
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sysinfo->ggc = 0x0002;
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sysinfo->ggc = 0x0002;
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else {
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else {
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/* 4 for 32MB, default if not set in CMOS */
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/* 4 for 32MB, default if not set in CMOS */
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u8 gfxsize = 4;
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u8 gfxsize = get_int_option("gfx_uma_size", 4);
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/* Graphics Stolen Memory: 2MB GTT (0x0300) when VT-d disabled,
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/* Graphics Stolen Memory: 2MB GTT (0x0300) when VT-d disabled,
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2MB GTT + 2MB shadow GTT (0x0b00) else. */
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2MB GTT + 2MB shadow GTT (0x0b00) else. */
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get_option(&gfxsize, "gfx_uma_size");
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/* Handle invalid CMOS settings */
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/* Handle invalid CMOS settings */
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/* Only allow settings between 32MB and 352MB */
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/* Only allow settings between 32MB and 352MB */
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gfxsize = MIN(MAX(gfxsize, 4), 12);
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gfxsize = MIN(MAX(gfxsize, 4), 12);
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@ -149,8 +149,7 @@ static void i945_setup_bars(void)
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pci_write_config32(HOST_BRIDGE, X60BAR, DEFAULT_X60BAR | 1);
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pci_write_config32(HOST_BRIDGE, X60BAR, DEFAULT_X60BAR | 1);
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/* vram size from CMOS option */
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/* vram size from CMOS option */
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if (get_option(&gfxsize, "gfx_uma_size") != CB_SUCCESS)
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gfxsize = get_int_option("gfx_uma_size", 2); /* 2 for 8MB */
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gfxsize = 2; /* 2 for 8MB */
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/* make sure no invalid setting is used */
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/* make sure no invalid setting is used */
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if (gfxsize > 6)
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if (gfxsize > 6)
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gfxsize = 2;
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gfxsize = 2;
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@ -707,15 +707,10 @@ static void gma_func0_disable(struct device *dev)
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static void gma_func1_init(struct device *dev)
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static void gma_func1_init(struct device *dev)
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{
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{
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u8 val;
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if (!CONFIG(NO_GFX_INIT))
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if (!CONFIG(NO_GFX_INIT))
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pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
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pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
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if (get_option(&val, "tft_brightness") == CB_SUCCESS)
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pci_write_config8(dev, 0xf4, get_int_option("tft_brightness", 0xff));
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pci_write_config8(dev, 0xf4, val);
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else
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pci_write_config8(dev, 0xf4, 0xff);
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}
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}
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static void gma_generate_ssdt(const struct device *device)
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static void gma_generate_ssdt(const struct device *device)
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@ -3102,10 +3102,7 @@ void chipset_init(const int s3resume)
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mchbar_write16(0x1170, 0xb880);
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mchbar_write16(0x1170, 0xb880);
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mchbar_clrsetbits8(0x1210, ~0, 0x84);
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mchbar_clrsetbits8(0x1210, ~0, 0x84);
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if (get_option(&gfxsize, "gfx_uma_size") != CB_SUCCESS) {
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gfxsize = get_int_option("gfx_uma_size", 0); /* 0 for 32MB */
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/* 0 for 32MB */
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gfxsize = 0;
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}
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ggc = 0xb00 | ((gfxsize + 5) << 4);
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ggc = 0xb00 | ((gfxsize + 5) << 4);
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@ -25,8 +25,7 @@ static void early_graphics_setup(void)
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pci_write_config8(HOST_BRIDGE, DEVEN, BOARD_DEVEN);
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pci_write_config8(HOST_BRIDGE, DEVEN, BOARD_DEVEN);
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/* Fetch VRAM size from CMOS option */
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/* Fetch VRAM size from CMOS option */
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if (get_option(®8, "gfx_uma_size") != CB_SUCCESS)
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reg8 = get_int_option("gfx_uma_size", 0); /* 0 for 8MB */
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reg8 = 0; /* 0 for 8MB */
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/* Ensure the setting is valid */
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/* Ensure the setting is valid */
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if (reg8 > 6)
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if (reg8 > 6)
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@ -86,10 +86,9 @@ static void sandybridge_setup_graphics(void)
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printk(BIOS_DEBUG, "Initializing Graphics...\n");
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printk(BIOS_DEBUG, "Initializing Graphics...\n");
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if (get_option(&gfxsize, "gfx_uma_size") != CB_SUCCESS) {
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/* Fall back to 32 MiB for IGD memory by setting GGC[7:3] = 1 */
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/* Setup IGD memory by setting GGC[7:3] = 1 for 32MB */
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gfxsize = get_int_option("gfx_uma_size", 0);
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gfxsize = 0;
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}
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reg16 = pci_read_config16(HOST_BRIDGE, GGC);
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reg16 = pci_read_config16(HOST_BRIDGE, GGC);
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reg16 &= ~0x00f8;
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reg16 &= ~0x00f8;
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reg16 |= (gfxsize + 1) << 3;
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reg16 |= (gfxsize + 1) << 3;
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@ -38,9 +38,8 @@ void x4x_early_init(void)
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/* Enable internal GFX */
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/* Enable internal GFX */
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pci_write_config32(HOST_BRIDGE, D0F0_DEVEN, BOARD_DEVEN);
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pci_write_config32(HOST_BRIDGE, D0F0_DEVEN, BOARD_DEVEN);
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/* Set preallocated IGD size from CMOS */
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/* Set preallocated IGD size from CMOS, or default to 64 MiB */
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u8 gfxsize = 6; /* 6 for 64MiB, default if not set in CMOS */
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u8 gfxsize = get_int_option("gfx_uma_size", 6);
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get_option(&gfxsize, "gfx_uma_size");
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if (gfxsize > 12)
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if (gfxsize > 12)
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gfxsize = 6;
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gfxsize = 6;
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/* Need at least 4M for cbmem_top alignment */
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/* Need at least 4M for cbmem_top alignment */
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