soc/intel/alderlake: Clean up FSP chipset lockdown configuration
Use a variable to store if the FSP should be responsible for the chipset lockdown and use it for setting related configuration options. Thus, get rid of that if-else-clause. Change-Id: Ia6485bde5b33af067dfb15ca410a164e288b76b2 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52846 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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@ -401,17 +401,11 @@ static void fill_fsps_chipset_lockdown_params(FSP_S_CONFIG *s_cfg,
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const struct soc_intel_alderlake_config *config)
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{
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/* Chipset Lockdown */
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if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) {
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s_cfg->PchLockDownGlobalSmi = 0;
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s_cfg->PchLockDownBiosInterface = 0;
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s_cfg->PchUnlockGpioPads = 1;
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s_cfg->RtcMemoryLock = 0;
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} else {
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s_cfg->PchLockDownGlobalSmi = 1;
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s_cfg->PchLockDownBiosInterface = 1;
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s_cfg->PchUnlockGpioPads = 0;
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s_cfg->RtcMemoryLock = 1;
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}
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const bool lockdown_by_fsp = get_lockdown_config() == CHIPSET_LOCKDOWN_FSP;
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s_cfg->PchLockDownGlobalSmi = lockdown_by_fsp;
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s_cfg->PchLockDownBiosInterface = lockdown_by_fsp;
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s_cfg->PchUnlockGpioPads = !lockdown_by_fsp;
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s_cfg->RtcMemoryLock = lockdown_by_fsp;
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/* coreboot will send EOP before loading payload */
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s_cfg->EndOfPostMessage = EOP_DISABLE;
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