drivers/intel/fsp1_1: remove orphaned functionality
Remove orphaned functionality from the FSP1.1 driver that only has been used by skylake, which is now FSP2.0-only. Change-Id: I732f2d6846788d5c03647c6fb620e45b3b66de5f Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36266 Reviewed-by: Michael Niewöhner Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -17,7 +17,6 @@ verstage-y += car.c
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verstage-y += fsp_util.c
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verstage-$(CONFIG_SEPARATE_VERSTAGE) += verstage.c
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bootblock-y += bootblock.c
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bootblock-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += cache_as_ram.S
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bootblock-y += fsp_util.c
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@ -1,56 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <fsp/bootblock.h>
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#include <fsp/util.h>
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static void fill_temp_ram_init_params(FSP_TEMP_RAM_INIT_PARAMS *params)
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{
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params->MicrocodeRegionBase = CONFIG_CPU_MICROCODE_CBFS_LOC;
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params->MicrocodeRegionLength = CONFIG_CPU_MICROCODE_CBFS_LEN;
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params->CodeRegionBase = 0xFFFFFFFF - CONFIG_ROM_SIZE + 1;
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params->CodeRegionLength = CONFIG_ROM_SIZE;
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}
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void bootblock_fsp_temp_ram_init(void)
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{
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FSP_TEMP_RAM_INIT fsp_temp_ram_init;
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FSP_TEMP_RAM_INIT_PARAMS temp_ram_init_params;
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FSP_INFO_HEADER *fih;
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EFI_STATUS status;
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/* Locate the FSP header */
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fih = find_fsp(CONFIG_FSP_LOC);
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/* Check the FSP header */
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if (((uintptr_t)fih >= ERROR_NO_FV_SIG) &&
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((uintptr_t)fih <= ERROR_FSP_REV_MISMATCH)) {
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printk(BIOS_ERR, "FSP header error %p, ", fih);
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fih = NULL;
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}
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if (fih == NULL)
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die("FSP_INFO_HEADER not set!\n");
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fill_temp_ram_init_params(&temp_ram_init_params);
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/* Perform Temp RAM Init */
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printk(BIOS_DEBUG, "Calling FspTempRamInit\n");
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post_code(POST_FSP_TEMP_RAM_INIT);
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fsp_temp_ram_init = (FSP_TEMP_RAM_INIT)(fih->ImageBase
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+ fih->TempRamInitEntryOffset);
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status = fsp_temp_ram_init(&temp_ram_init_params);
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printk(BIOS_DEBUG, "FspTempRamInit returned 0x%08x\n", status);
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if (status != FSP_SUCCESS)
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die("FspTempRamInit failed. Giving up.");
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}
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@ -1,19 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef FSP1_1_BOOTBLOCK_H
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#define FSP1_1_BOOTBLOCK_H
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void bootblock_fsp_temp_ram_init(void);
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#endif
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