drivers/intel/fsp1_1: remove orphaned functionality

Remove orphaned functionality from the FSP1.1 driver that only has been
used by skylake, which is now FSP2.0-only.

Change-Id: I732f2d6846788d5c03647c6fb620e45b3b66de5f
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36266
Reviewed-by: Michael Niewöhner
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2019-10-23 17:40:10 +02:00 committed by Nico Huber
parent 0f91f79447
commit fa62e01b90
3 changed files with 0 additions and 76 deletions

View File

@ -17,7 +17,6 @@ verstage-y += car.c
verstage-y += fsp_util.c
verstage-$(CONFIG_SEPARATE_VERSTAGE) += verstage.c
bootblock-y += bootblock.c
bootblock-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += cache_as_ram.S
bootblock-y += fsp_util.c

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@ -1,56 +0,0 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <fsp/bootblock.h>
#include <fsp/util.h>
static void fill_temp_ram_init_params(FSP_TEMP_RAM_INIT_PARAMS *params)
{
params->MicrocodeRegionBase = CONFIG_CPU_MICROCODE_CBFS_LOC;
params->MicrocodeRegionLength = CONFIG_CPU_MICROCODE_CBFS_LEN;
params->CodeRegionBase = 0xFFFFFFFF - CONFIG_ROM_SIZE + 1;
params->CodeRegionLength = CONFIG_ROM_SIZE;
}
void bootblock_fsp_temp_ram_init(void)
{
FSP_TEMP_RAM_INIT fsp_temp_ram_init;
FSP_TEMP_RAM_INIT_PARAMS temp_ram_init_params;
FSP_INFO_HEADER *fih;
EFI_STATUS status;
/* Locate the FSP header */
fih = find_fsp(CONFIG_FSP_LOC);
/* Check the FSP header */
if (((uintptr_t)fih >= ERROR_NO_FV_SIG) &&
((uintptr_t)fih <= ERROR_FSP_REV_MISMATCH)) {
printk(BIOS_ERR, "FSP header error %p, ", fih);
fih = NULL;
}
if (fih == NULL)
die("FSP_INFO_HEADER not set!\n");
fill_temp_ram_init_params(&temp_ram_init_params);
/* Perform Temp RAM Init */
printk(BIOS_DEBUG, "Calling FspTempRamInit\n");
post_code(POST_FSP_TEMP_RAM_INIT);
fsp_temp_ram_init = (FSP_TEMP_RAM_INIT)(fih->ImageBase
+ fih->TempRamInitEntryOffset);
status = fsp_temp_ram_init(&temp_ram_init_params);
printk(BIOS_DEBUG, "FspTempRamInit returned 0x%08x\n", status);
if (status != FSP_SUCCESS)
die("FspTempRamInit failed. Giving up.");
}

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@ -1,19 +0,0 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef FSP1_1_BOOTBLOCK_H
#define FSP1_1_BOOTBLOCK_H
void bootblock_fsp_temp_ram_init(void);
#endif