cpu/x86: Put guard around align for smm_save_state_size
The STM support aligns the smm_save_state_size. However, this creates issue for some platforms because of this value being hard coded to 0x400 Signed-off-by: Eugene D. Myers <edmyers@tycho.nsa.gov> Change-Id: Ia584f7e9b86405a12eb6cbedc3a2615a8727f69e Reviewed-on: https://review.coreboot.org/c/coreboot/+/38734 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: ron minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -1044,7 +1044,7 @@ static void fill_mp_state(struct mp_state *state, const struct mp_ops *ops)
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/*
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* Make sure there is enough room for the SMM descriptor
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*/
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if (CONFIG(STM))
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if (CONFIG(STM)) {
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state->smm_save_state_size +=
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sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR);
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@ -1052,9 +1052,14 @@ static void fill_mp_state(struct mp_state *state, const struct mp_ops *ops)
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* algorithm. (align on 4K)
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* note: In the future, this will need to handle newer x86 processors
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* that require alignment of the save state on 32K boundaries.
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* The alignment is done here because coreboot has a hard coded
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* value of 0x400 for this value.
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* Also, this alignment only works on CPUs less than 5 threads
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*/
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if (CONFIG(STM))
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state->smm_save_state_size =
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ALIGN_UP(state->smm_save_state_size, 0x1000);
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}
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/*
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* Default to smm_initiate_relocation() if trigger callback isn't
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