soc/intel/apl: Use Kconfig to enable CseRbp
This patch makes SKIP_CSE_RBP=y default for Apollo Lake if Boot Device is memory mapped and ensures SkipCseRbp UPD is guarded against this config. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ifd01a25443e2582a90529e55be8d34a88342a103 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61282 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -117,6 +117,15 @@ config CPU_SPECIFIC_OPTIONS
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# provide a custom media driver that facilitates mapping
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# provide a custom media driver that facilitates mapping
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select X86_CUSTOM_BOOTMEDIA
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select X86_CUSTOM_BOOTMEDIA
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config SKIP_CSE_RBP
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bool
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default y if BOOT_DEVICE_MEMORY_MAPPED
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help
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Tell CSE we do not need to use Ring Buffer Protocol (RBP) to fetch
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firmware for us if we are using memory-mapped SPI. This lets CSE
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state machine transition to next boot state, so that it can function
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as designed.
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config DISABLE_HECI1_AT_PRE_BOOT
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config DISABLE_HECI1_AT_PRE_BOOT
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default y
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default y
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@ -293,14 +293,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
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/* Do NOT let FSP do any GPIO pad configuration */
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/* Do NOT let FSP do any GPIO pad configuration */
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mupd->FspmConfig.PreMemGpioTablePtr = (uintptr_t) NULL;
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mupd->FspmConfig.PreMemGpioTablePtr = (uintptr_t) NULL;
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/*
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mupd->FspmConfig.SkipCseRbp = CONFIG(SKIP_CSE_RBP);
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* Tell CSE we do not need to use Ring Buffer Protocol (RBP) to fetch
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* firmware for us if we are using memory-mapped SPI. This lets CSE
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* state machine transition to next boot state, so that it can function
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* as designed.
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*/
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mupd->FspmConfig.SkipCseRbp =
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CONFIG(BOOT_DEVICE_MEMORY_MAPPED);
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/*
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/*
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* Converged Security Engine (CSE) has secure storage functionality.
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* Converged Security Engine (CSE) has secure storage functionality.
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