soc/amd/stoneyridge: Add USB OC support
Add USB overcurrent support. Adds a weak call for mainboards that don't suport USB OC. BUG=b:69229635 Change-Id: Ie54c7a2baa78f21cf1cd30d5ed70c8c832cf3674 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/22678 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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@ -268,6 +268,28 @@
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#define PWR_RESET_CFG 0x10
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#define PWR_RESET_CFG 0x10
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#define TOGGLE_ALL_PWR_GOOD BIT(1)
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#define TOGGLE_ALL_PWR_GOOD BIT(1)
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#define XHCI_PM_INDIRECT_INDEX 0x48
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#define XHCI_PM_INDIRECT_DATA 0x4C
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#define XHCI_OVER_CURRENT_CONTROL 0x30
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#define EHCI_OVER_CURRENT_CONTROL 0x70
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#define USB_OC0 0
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#define USB_OC1 1
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#define USB_OC2 2
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#define USB_OC3 3
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#define USB_OC4 4
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#define USB_OC5 5
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#define USB_OC6 6
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#define USB_OC7 7
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#define USB_OC_DISABLE 0xf
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#define USB_OC_DISABLE_ALL 0xffff
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#define OC_PORT0_SHIFT 0
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#define OC_PORT1_SHIFT 4
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#define OC_PORT2_SHIFT 8
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#define OC_PORT3_SHIFT 12
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static inline int sb_sata_enable(void)
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static inline int sb_sata_enable(void)
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{
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{
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/* True if IDE or AHCI. */
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/* True if IDE or AHCI. */
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@ -322,4 +344,13 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
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int s3_save_nvram_early(u32 dword, int size, int nvram_pos);
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int s3_save_nvram_early(u32 dword, int size, int nvram_pos);
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void bootblock_fch_early_init(void);
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void bootblock_fch_early_init(void);
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/*
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* Call the mainboard to get the USB Over Current Map. The mainboard
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* returns the map and 0 on Success or -1 on error or no map. There is
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* a default weak function in usb.c if the mainboard doesn't have any
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* over current support.
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*/
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int mainboard_get_xhci_oc_map(uint16_t *usb_oc_map);
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int mainboard_get_ehci_oc_map(uint16_t *usb_oc_map);
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#endif /* __STONEYRIDGE_H__ */
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#endif /* __STONEYRIDGE_H__ */
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@ -20,8 +20,40 @@
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#include <device/pci_ops.h>
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#include <device/pci_ops.h>
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#include <device/pci_ehci.h>
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#include <device/pci_ehci.h>
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#include <arch/io.h>
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#include <arch/io.h>
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#include <soc/pci_devs.h>
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#include <soc/southbridge.h>
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#include <soc/southbridge.h>
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static void set_usb_over_current(struct device *dev)
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{
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uint16_t map = USB_OC_DISABLE_ALL;
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if (dev->path.pci.devfn == XHCI_DEVFN) {
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if (mainboard_get_xhci_oc_map(&map) == 0) {
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xhci_pm_write32(XHCI_PM_INDIRECT_INDEX,
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XHCI_OVER_CURRENT_CONTROL);
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xhci_pm_write16(XHCI_PM_INDIRECT_DATA, map);
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}
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}
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if (dev->path.pci.devfn == EHCI1_DEVFN) {
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if (mainboard_get_ehci_oc_map(&map) == 0)
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pci_write_config16(dev, EHCI_OVER_CURRENT_CONTROL, map);
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}
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}
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int __attribute__((weak)) mainboard_get_xhci_oc_map(uint16_t *map)
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{
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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return -1;
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}
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int __attribute__((weak)) mainboard_get_ehci_oc_map(uint16_t *map)
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{
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printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
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return -1;
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}
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static struct pci_operations lops_pci = {
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static struct pci_operations lops_pci = {
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.set_subsystem = pci_dev_set_subsystem,
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.set_subsystem = pci_dev_set_subsystem,
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};
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};
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@ -30,7 +62,7 @@ static struct device_operations usb_ops = {
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.read_resources = pci_ehci_read_resources,
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.read_resources = pci_ehci_read_resources,
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.set_resources = pci_dev_set_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = NULL,
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.init = set_usb_over_current,
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.scan_bus = NULL,
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.scan_bus = NULL,
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.ops_pci = &lops_pci,
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.ops_pci = &lops_pci,
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};
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};
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