sb/amd/amd8111: Define ACPI sleep states
Note that against the specs, these definitions repeat the sleep type also in the reserved fields 3 and 4. For consistency, don't fix it here now. Entry for \_S3 is now masked off if HAVE_ACPI_RESUME=n. Change-Id: Icdc4c81d07fe7a99d5b0f8fa23e9443f58a40ab9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21143 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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@ -26,10 +26,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
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Method (FWSO, 0, NotSerialized) { }
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Name (_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 })
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Name (_S1, Package (0x04) { 0x01, 0x01, 0x01, 0x01 })
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Name (_S3, Package (0x04) { 0x05, 0x05, 0x05, 0x05 })
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Name (_S5, Package (0x04) { 0x07, 0x07, 0x07, 0x07 })
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Scope (_SB)
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{
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@ -25,10 +25,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
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Method (FWSO, 0, NotSerialized) { }
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Name (_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 })
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Name (_S1, Package (0x04) { 0x01, 0x01, 0x01, 0x01 })
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Name (_S3, Package (0x04) { 0x05, 0x05, 0x05, 0x05 })
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Name (_S5, Package (0x04) { 0x07, 0x07, 0x07, 0x07 })
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Scope (_SB)
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{
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@ -203,27 +203,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
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// Optional
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//}
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// System \_Sx states
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// Four bytes must be stored for each supported power state:
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// 0:7 Value for PM1a_CNT.SLP_TYP register to enter this system state.
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// 8:f Value for PM1b_CNT.SLP_TYP register to enter this system state.
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// To enter any given state, OSPM must write the PM1a_CNT.SLP_TYP
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// register before the PM1b_CNT.SLP_TYP register.
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// 10:1f Reserved
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// The states are:
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// S0 : Working
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// S1 : Sleeping with Processor Context maintained
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// S2 : Sleeping with Processor Context not maintained
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// S3 : Same as S2, but more power saving (e.g. suspend to RAM)
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// S4 : DRAM context not maintained (e.g. suspend to disk)
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// S5 : Soft Off
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// If only S0 and S5 are declared then no wake-up methods are needed
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
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// S1 support should work, but never wakes up, so it's commented out
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//Name (\_S1, Package () { 0x01, 0x01, 0x01, 0x01 })
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//Name (\_S3, Package () { 0x05, 0x05, 0x05, 0x05 })
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Name (\_S5, Package () { 0x07, 0x07, 0x07, 0x07 })
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//Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
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#include <southbridge/amd/amd8111/acpi/sleepstates.asl>
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Method (WAK, 1, NotSerialized) {}
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@ -14,11 +14,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
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Method (FWSO, 0, NotSerialized) { }
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Name (_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 })
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Name (_S1, Package (0x04) { 0x01, 0x01, 0x01, 0x01 })
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Name (_S3, Package (0x04) { 0x05, 0x05, 0x05, 0x05 })
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Name (_S5, Package (0x04) { 0x07, 0x07, 0x07, 0x07 })
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Scope (_SB)
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{
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Device (PCI0)
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@ -0,0 +1,39 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
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Name (SSFG, 0x05)
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#else
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Name (SSFG, 0x01)
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#endif
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (And(SSFG, 0x01)) {
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Name(\_S1, Package () {0x01, 0x01, 0x01, 0x01} ) /* (S1) - sleeping w/CPU context */
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}
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If (And(SSFG, 0x02)) {
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Name(\_S2, Package () {0x02, 0x02, 0x02, 0x02} ) /* (S2) - "light" Suspend to RAM */
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}
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If (And(SSFG, 0x04)) {
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Name(\_S3, Package () {0x05, 0x05, 0x05, 0x05} ) /* (S3) - Suspend to RAM */
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}
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If (And(SSFG, 0x08)) {
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Name(\_S4, Package () {0x06, 0x06, 0x06, 0x06} ) /* (S4) - Suspend to Disk */
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}
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Name(\_S5, Package () {0x07, 0x07, 0x07, 0x07} ) /* (S5) - Soft Off */
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