GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Fixes for SONE 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1224 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich 2003-10-21 14:52:47 +00:00
parent 4398d1e5a9
commit fc76dcf0d0
3 changed files with 5 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/via/epia/Config.lb
View File

@ -220,7 +220,7 @@ northbridge via/vt8601 "vt8601"
# pci 0:11.6 # pci 0:11.6
# pci 0:12.0 # pci 0:12.0
register "enable_usb" = "0" register "enable_usb" = "0"
register "enable_native_ide" = "1" register "enable_native_ide" = "0"
register "enable_com_ports" = "1" register "enable_com_ports" = "1"
register "enable_keyboard" = "0" register "enable_keyboard" = "0"
register "enable_nvram" = "1" register "enable_nvram" = "1"

2
src/mainboard/via/epia/auto.c
View File

@ -11,6 +11,7 @@
#include "arch/i386/lib/console.c" #include "arch/i386/lib/console.c"
#include "ram/ramtest.c" #include "ram/ramtest.c"
#include "northbridge/via/vt8601/raminit.h" #include "northbridge/via/vt8601/raminit.h"
#include "cpu/p6/earlymtrr.c"
/* /*
*/ */
void udelay(int usecs) void udelay(int usecs)
@ -135,4 +136,5 @@ static void main(void)
ram_check(check_addrs[i].lo, check_addrs[i].hi); ram_check(check_addrs[i].lo, check_addrs[i].hi);
} }
#endif #endif
early_mtrr_init();
} }

4
src/southbridge/via/vt8231/vt8231.c
View File

@ -335,11 +335,11 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf)
// //
// IDE setup // IDE setup
// //
if (conf->enable_native_ide) { if (! conf->enable_native_ide) {
// Run the IDE controller in 'compatiblity mode - i.e. don't use PCI // Run the IDE controller in 'compatiblity mode - i.e. don't use PCI
// interrupts. Using PCI ints confuses linux for some reason. // interrupts. Using PCI ints confuses linux for some reason.
printk_info("%s: enabling native IDE addresses\n", __FUNCTION__); printk_info("%s: enabling compatibility IDE addresses\n", __FUNCTION__);
enables = pci_read_config8(dev1, 0x42); enables = pci_read_config8(dev1, 0x42);
printk_debug("enables in reg 0x42 0x%x\n", enables); printk_debug("enables in reg 0x42 0x%x\n", enables);
enables &= ~0xc0; // compatability mode enables &= ~0xc0; // compatability mode