GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/purism/librem_14: Move/fix touchpad interrupt GPIO 

On production boards, the touchpad interrupt line was moved
from GPP_B20 to GPP_B3. Fix the GPIO pad config and devicetree entry,
and update documentation to remove touchpad config issue.

Change-Id: Iaefeba8f78c567b67e7a416c27299bff574c23ab
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51797
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2021-03-25 07:38:30 -05:00 committed by Patrick Georgi
parent 385667f679
commit fcb68f31b6
3 changed files with 5 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Documentation/mainboard/purism/librem_14.md
View File

@ -85,10 +85,6 @@ located underneath the Wi-Fi module, below the left cooling fan.
* Automatic detection of external audio input/output via the 3.5mm jack * Automatic detection of external audio input/output via the 3.5mm jack
does not currently work. does not currently work.
* Touchpad interrupt non-functional when correctly configured as active-low
and level-triggered, so configured as active-high instead. This causes an
interrupt storm and prevents the CPU from idling due to moderate (10-20%)
usage on a single core.
* PL1/PL2 limited to 15W/20W by charger and battery discharge capability, * PL1/PL2 limited to 15W/20W by charger and battery discharge capability,
not SoC or thermal design. not SoC or thermal design.

2
src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb
View File

@ -185,7 +185,7 @@ chip soc/intel/cannonlake
register "generic.hid" = ""HTIX5288"" register "generic.hid" = ""HTIX5288""
register "generic.name" = ""TPD0"" register "generic.name" = ""TPD0""
register "generic.uid" = "1" register "generic.uid" = "1"
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B20_IRQ)" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
register "hid_desc_reg_offset" = "0x20" register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end device i2c 2c on end
end end

13
src/mainboard/purism/librem_cnl/variants/librem_14/gpio.c
View File

@ -90,8 +90,8 @@ static const struct pad_config gpio_table[] = {
/* GPP_B2 - VRALERT# */ /* GPP_B2 - VRALERT# */
PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1),
/* GPP_B3 - NC */ /* GPP_B3 - TP_INT# */
PAD_NC(GPP_B3, NONE), PAD_CFG_GPI_APIC_LOW(GPP_B3, NONE, PLTRST),
/* GPP_B4 - NC */ /* GPP_B4 - NC */
PAD_NC(GPP_B4, UP_20K), PAD_NC(GPP_B4, UP_20K),
@ -141,13 +141,8 @@ static const struct pad_config gpio_table[] = {
/* GPP_B19 - USB3_P1_PWREN */ /* GPP_B19 - USB3_P1_PWREN */
PAD_CFG_GPO(GPP_B19, 1, PLTRST), PAD_CFG_GPO(GPP_B19, 1, PLTRST),
/* GPP_B20 - TP_INT# /* GPP_B20 - NC */
* PAD_NC(GPP_B20, NONE),
* Due to interrupts failing to trigger when correctly configured
* active-low as PAD_CFG_GPI_APIC_LOW(GPP_B20, NONE, PLTRST),
* must configure instead as active-high:
*/
PAD_CFG_GPI_TRIG_OWN(GPP_B20, NONE, PLTRST, LEVEL, ACPI),
/* GPP_B21 - NC */ /* GPP_B21 - NC */
PAD_NC(GPP_B21, UP_20K), PAD_NC(GPP_B21, UP_20K),