mb/google/guybrush/var/guybrush: Update GPIO configuration
Some of the GPIOs are either re-purposed for different use-cases or are unused in upcoming board phase (board version 2). Update the GPIO configuration accordingly. Here are the GPIOs that are updated: GPIO Board Id 1 Board Id 2 ============================================= GPIO31 TP183 EN_SPKR GPIO69 EN_SPKR SD_AUX_REST_L GPIO70 SD_AUX_RESET_L Unused TP27 GPIO74 RAM_ID_CHAN_SEL Unused TP49 BUG=b:189327557, b:188542649, b:188542497 TEST=Build Guybrush mainboard. Verify Audio is audible and SD card is detected fine in Board ID 1. Change-Id: I31523b3e03d2b59577f33eae548747834cfc98aa Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55148 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
parent
260f0f93ef
commit
fcb9716db5
|
@ -64,8 +64,8 @@ static const struct soc_amd_gpio base_gpio_table[] = {
|
||||||
PAD_GPO(GPIO_29, LOW),
|
PAD_GPO(GPIO_29, LOW),
|
||||||
/* ESPI_CS_L */
|
/* ESPI_CS_L */
|
||||||
PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
|
PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
|
||||||
/* SPI_CS3_L */
|
/* EN_SPKR */
|
||||||
PAD_NF(GPIO_31, SPI_CS3_L, PULL_NONE),
|
PAD_GPO(GPIO_31, HIGH),
|
||||||
/* EN_PWR_FP */
|
/* EN_PWR_FP */
|
||||||
PAD_GPO(GPIO_32, HIGH),
|
PAD_GPO(GPIO_32, HIGH),
|
||||||
/* GPIO_33 - GPIO_39: Not available */
|
/* GPIO_33 - GPIO_39: Not available */
|
||||||
|
@ -79,13 +79,13 @@ static const struct soc_amd_gpio base_gpio_table[] = {
|
||||||
PAD_GPI(GPIO_67, PULL_NONE),
|
PAD_GPI(GPIO_67, PULL_NONE),
|
||||||
/* EN_PP3300_TCHSCR */
|
/* EN_PP3300_TCHSCR */
|
||||||
PAD_GPO(GPIO_68, LOW),
|
PAD_GPO(GPIO_68, LOW),
|
||||||
/* EN_SPKR */
|
|
||||||
PAD_GPO(GPIO_69, HIGH),
|
|
||||||
/* SD_AUX_RESET_L */
|
/* SD_AUX_RESET_L */
|
||||||
PAD_GPO(GPIO_70, HIGH),
|
PAD_GPO(GPIO_69, HIGH),
|
||||||
|
/* Unused TP27 */
|
||||||
|
PAD_NC(GPIO_70),
|
||||||
/* GPIO_71 - GPIO_73: Not available */
|
/* GPIO_71 - GPIO_73: Not available */
|
||||||
/* RAM_ID_CHAN_SEL */
|
/* Unused TP49 */
|
||||||
PAD_GPI(GPIO_74, PULL_NONE),
|
PAD_NC(GPIO_74),
|
||||||
/* RAM_ID_2 / DEV_BEEP_LRCLK */
|
/* RAM_ID_2 / DEV_BEEP_LRCLK */
|
||||||
PAD_GPI(GPIO_75, PULL_NONE),
|
PAD_GPI(GPIO_75, PULL_NONE),
|
||||||
/* EN_PP3300_CAM */
|
/* EN_PP3300_CAM */
|
||||||
|
|
|
@ -8,8 +8,14 @@
|
||||||
|
|
||||||
/* This table is used by guybrush variant with board version < 2. */
|
/* This table is used by guybrush variant with board version < 2. */
|
||||||
static const struct soc_amd_gpio bid1_gpio_table[] = {
|
static const struct soc_amd_gpio bid1_gpio_table[] = {
|
||||||
|
/* Unused TP183 */
|
||||||
|
PAD_NC(GPIO_31),
|
||||||
/* EN_SPKR */
|
/* EN_SPKR */
|
||||||
PAD_GPO(GPIO_69, LOW),
|
PAD_GPO(GPIO_69, HIGH),
|
||||||
|
/* SD_AUX_RESET_L */
|
||||||
|
PAD_GPO(GPIO_70, HIGH),
|
||||||
|
/* RAM_ID_CHAN_SEL */
|
||||||
|
PAD_GPI(GPIO_74, PULL_NONE),
|
||||||
};
|
};
|
||||||
|
|
||||||
const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
|
const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
|
||||||
|
|
Loading…
Reference in New Issue