vc/amd/fsp: Update bl_errorcodes_public.h
Replace the initial bl_errorcodes_public.h (a temporary, minimal version) with the full version released by AMD. BUG=None TEST=Build BRANCH=Zork Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I82585c74d74139a96419b9bffe1df3b8c344eb5f Reviewed-on: https://review.coreboot.org/c/coreboot/+/45943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
parent
902518e983
commit
fdcbae0a9b
|
@ -124,13 +124,13 @@ static uint32_t map_fch_devices(void)
|
||||||
bar_map[i].set_bar(bar);
|
bar_map[i].set_bar(bar);
|
||||||
}
|
}
|
||||||
|
|
||||||
return BL_UAPP_OK;
|
return BL_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t unmap_fch_devices(void)
|
uint32_t unmap_fch_devices(void)
|
||||||
{
|
{
|
||||||
void *bar;
|
void *bar;
|
||||||
uint32_t err, rtn = BL_UAPP_OK;
|
uint32_t err, rtn = BL_OK;
|
||||||
unsigned int i;
|
unsigned int i;
|
||||||
|
|
||||||
for (i = 0; i < ARRAY_SIZE(bar_map); ++i) {
|
for (i = 0; i < ARRAY_SIZE(bar_map); ++i) {
|
||||||
|
|
|
@ -72,7 +72,7 @@ ENTRY(_psp_vs_start)
|
||||||
// to main BL using Svc_Exit().
|
// to main BL using Svc_Exit().
|
||||||
//
|
//
|
||||||
ShouldNotBeReached:
|
ShouldNotBeReached:
|
||||||
mov r0, #BL_UAPP_ERR_GENERIC // Returned from Main
|
mov r0, #BL_ERR_GENERIC // Returned from Main
|
||||||
svc #0x0 // SVC_EXIT
|
svc #0x0 // SVC_EXIT
|
||||||
|
|
||||||
ENDPROC(_psp_vs_start)
|
ENDPROC(_psp_vs_start)
|
||||||
|
@ -95,7 +95,7 @@ ENTRY(AllocateStack)
|
||||||
bne ret
|
bne ret
|
||||||
|
|
||||||
svcExit:
|
svcExit:
|
||||||
mov r0, #BL_UAPP_ERR_GENERIC
|
mov r0, #BL_ERR_GENERIC
|
||||||
svc #0x0 // SVC_EXIT
|
svc #0x0 // SVC_EXIT
|
||||||
|
|
||||||
ret:
|
ret:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
*
|
*
|
||||||
* Copyright (c) 2019, Advanced Micro Devices, Inc.
|
* Copyright (c) 2020, Advanced Micro Devices, Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
@ -30,7 +30,51 @@
|
||||||
#ifndef BL_ERRORCODES_PUBLIC_H
|
#ifndef BL_ERRORCODES_PUBLIC_H
|
||||||
#define BL_ERRORCODES_PUBLIC_H
|
#define BL_ERRORCODES_PUBLIC_H
|
||||||
|
|
||||||
#define BL_UAPP_OK 0x00 // General - Success
|
/* Bootloader Return Codes, Error only (0x00 through 0x9F) */
|
||||||
#define BL_UAPP_ERR_GENERIC 0x01 // Generic Error Code
|
#define BL_OK 0x00 // General - Success
|
||||||
|
#define BL_ERR_GENERIC 0x01 // Generic Error Code
|
||||||
|
#define BL_ERR_MEMORY 0x02 // Generic Memory Error
|
||||||
|
#define BL_ERR_BUFFER_OVERFLOW 0x03 // Buffer Overflow
|
||||||
|
#define BL_ERR_INVALID_PARAMETER 0x04 // Invalid Parameter(s)
|
||||||
|
#define BL_ERR_DATA_ALIGNMENT 0x06 // Data Alignment Error
|
||||||
|
#define BL_ERR_NULL_PTR 0x07 // Null Pointer Error
|
||||||
|
#define BL_ERR_INVALID_ADDRESS 0x0A // Invalid Address
|
||||||
|
#define BL_ERR_OUT_OF_RESOURCES 0x0B // Out of Resource Error
|
||||||
|
#define BL_ERR_DATA_ABORT 0x0D // Data Abort exception
|
||||||
|
#define BL_ERR_PREFETCH_ABORT 0x0E // Prefetch Abort exception
|
||||||
|
#define BL_ERR_GET_FW_HEADER 0x13 // Failure in retrieving firmware
|
||||||
|
// header
|
||||||
|
#define BL_ERR_KEY_SIZE 0x14 // Key size not supported
|
||||||
|
#define BL_ERR_ENTRY_NOT_FOUND 0x15 // Entry not found at requested
|
||||||
|
// location
|
||||||
|
#define BL_ERR_UNSUPPORTED_PLATFORM 0x16 // Error when feature is not enabled
|
||||||
|
// on a given platform.
|
||||||
|
#define BL_ERR_FWVALIDATION 0x18 // Generic FW Validation error
|
||||||
|
#define BL_ERR_CCP_RSA 0x19 // RSA operation fail - bootloader
|
||||||
|
#define BL_ERR_CCP_PASSTHR 0x1A // CCP Passthrough operation failed
|
||||||
|
#define BL_ERR_CCP_AES 0x1B // AES operation failed
|
||||||
|
#define BL_ERR_SHA 0x1E // SHA256/SHA384 operation failed
|
||||||
|
#define BL_ERR_ZLIB 0x1F // ZLib Decompression operation fail
|
||||||
|
#define BL_ERR_DIR_ENTRY_NOT_FOUND 0x22 // PSP directory entry not found
|
||||||
|
#define BL_ERR_SYSHUBMAP_FAILED 0x3A // Unable to map a SYSHUB address to
|
||||||
|
// AXI space
|
||||||
|
#define BL_ERR_UAPP_PSP_HEADER_NOT_MATCH 0x7A // PSP level directory from OEM user-
|
||||||
|
// app does not match expected value.
|
||||||
|
#define BL_ERR_UAPP_BIOS_HEADER_NOT_MATCH 0x7B // BIOS level directory from OEM
|
||||||
|
// user-app not match expected value.
|
||||||
|
#define BL_ERR_UAPP_PSP_DIR_OFFSET_NOT_SET 0x7C // PSP Directory offset is not set
|
||||||
|
// by OEM user-app.
|
||||||
|
#define BL_ERR_UAPP_BIOS_DIR_OFFSET_NOT_SET 0x7D // BIOS Directory offset is not set
|
||||||
|
// by OEM user-app.
|
||||||
|
#define BL_ERR_POSTCODE_MAX_VALUE 0x9F // The maximum allowable error post
|
||||||
|
|
||||||
#endif // BL_ERRORCODES_PUBLIC_H
|
/* Bootloader Return Codes, Success only (0xA0 through 0xFF) */
|
||||||
|
#define BL_SUCCESS_USERMODE_OEM_APP 0xF7 // Updated only PSPFW Status when OEM
|
||||||
|
// PSP BL user app returns success.
|
||||||
|
#define BL_SUCCESS_PSP_BIOS_DIRECTORY_UPDATE 0xF8 // PSP and BIOS directories are loaded
|
||||||
|
// into SRAM from the offset provided
|
||||||
|
// by OEM user app.
|
||||||
|
|
||||||
|
#define BL_SUCCESS_LAST_CODE 0xFF // Bootloader sequence finished
|
||||||
|
|
||||||
|
#endif /* BL_ERRORCODES_PUBLIC_H */
|
||||||
|
|
Loading…
Reference in New Issue