soc/ti/am335x: Fix timer implementation
Implements the monotonic timer using the am335x dmtimer peripheral. Change-Id: I4736b6d3b6e26370be9e8f369fc02285ad519223 Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44383 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -1,18 +1,15 @@
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ifeq ($(CONFIG_SOC_TI_AM335X),y)
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bootblock-y += bootblock.c
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bootblock-y += bootblock_media.c
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bootblock-y += dmtimer.c
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bootblock-y += timer.c
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bootblock-y += gpio.c
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bootblock-y += pinmux.c
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bootblock-y += monotonic_timer.c
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romstage-y += nand.c
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romstage-y += cbmem.c
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romstage-y += dmtimer.c
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romstage-y += monotonic_timer.c
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romstage-y += timer.c
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ramstage-y += dmtimer.c
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ramstage-y += monotonic_timer.c
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ramstage-y += timer.c
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ramstage-y += nand.c
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ramstage-y += soc.c
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@ -1,12 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "dmtimer.h"
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void dmtimer_start(int num)
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{
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}
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uint64_t dmtimer_raw_value(int num)
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{
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return 0;
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}
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@ -5,9 +5,33 @@
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#include <stdint.h>
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#define OSC_HZ 24000000
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#define M_OSC_MHZ (24)
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void dmtimer_start(int num);
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uint64_t dmtimer_raw_value(int num);
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struct am335x_dmtimer {
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uint32_t tidr;
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uint8_t res1[12];
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uint32_t tiocp_cfg;
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uint8_t res2[12];
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uint32_t irq_eoi;
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uint32_t irqstatus_raw;
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uint32_t irqstatus;
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uint32_t irqenable_set;
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uint32_t irqenable_clr;
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uint32_t irqwakeen;
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uint32_t tclr;
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uint32_t tcrr;
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uint32_t tldr;
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uint32_t ttgr;
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uint32_t twps;
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uint32_t tmar;
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uint32_t tcar1;
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uint32_t tsicr;
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uint32_t tcar2;
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};
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#define TCLR_ST (0x01 << 0)
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#define TCLR_AR (0x01 << 1)
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#define DMTIMER_2 (0x48040000)
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#endif
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@ -1,40 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <stdint.h>
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#include <delay.h>
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#include <timer.h>
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#include "dmtimer.h"
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static struct monotonic_counter {
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int initialized;
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struct mono_time time;
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uint64_t last_value;
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} mono_counter;
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static const uint32_t clocks_per_usec = OSC_HZ/1000000;
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void timer_monotonic_get(struct mono_time *mt)
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{
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uint64_t current_tick;
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uint64_t usecs_elapsed;
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if (!mono_counter.initialized) {
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init_timer();
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mono_counter.last_value = dmtimer_raw_value(0);
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mono_counter.initialized = 1;
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}
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current_tick = dmtimer_raw_value(0);
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usecs_elapsed = (current_tick - mono_counter.last_value) /
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clocks_per_usec;
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/* Update current time and tick values only if a full tick occurred. */
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if (usecs_elapsed) {
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mono_time_add_usecs(&mono_counter.time, usecs_elapsed);
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mono_counter.last_value = current_tick;
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}
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/* Save result. */
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*mt = mono_counter.time;
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}
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@ -0,0 +1,31 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <timer.h>
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#include <delay.h>
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#include <device/mmio.h>
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#include "dmtimer.h"
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#include "clock.h"
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struct am335x_dmtimer *dmtimer_2 = (struct am335x_dmtimer *)DMTIMER_2;
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#define CLKSEL_M_OSC (0x01 << 0)
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static uint32_t timer_raw_value(void)
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{
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return read32(&dmtimer_2->tcrr);
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}
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void timer_monotonic_get(struct mono_time *mt)
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{
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mono_time_set_usecs(mt, timer_raw_value() / M_OSC_MHZ);
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}
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void init_timer(void)
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{
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write32(&am335x_cm_dpll->clksel_timer2_clk, CLKSEL_M_OSC);
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// Start the dmtimer in autoreload mode without any prescalers
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// With M_OSC at 24MHz, this gives a few minutes before the timer overflows
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write32(&dmtimer_2->tclr, TCLR_ST | TCLR_AR);
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}
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