soc/intel: Update API name `pmc_send_bios_reset_pci_enum_done`
This patch updates PMC API name from `pmc_send_pci_enum_done` to `pmc_send_bios_reset_pci_enum_done` to inform PMC IPC about BIOS done is also set along with PMC enumeration being done. BUG=b:270942083 TEST=Able to build and boot google/rex. Change-Id: I1cf8cb1ecadeb68c109be6b0e751a3f2c448ae4f Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73332 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
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@ -38,8 +38,8 @@ static void pmc_lockdown_cfg(int chipset_lockdown)
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PM_CFG_XRAM_READ_DISABLE);
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}
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/* Send PMC IPC to inform about PCI enumeration done */
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pmc_send_pci_enum_done();
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/* Send PMC IPC to inform about both BIOS Reset and PCI enumeration done */
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pmc_send_bios_reset_pci_enum_done();
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}
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static void pch_lockdown_cfg(void)
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@ -28,8 +28,11 @@ enum pch_pmc_xtal {
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*/
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enum pch_pmc_xtal pmc_get_xtal_freq(void);
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/* pmc_send_pci_enum_done() - send PMC IPC to inform PCI enumeration is done. */
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void pmc_send_pci_enum_done(void);
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/*
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* pmc_send_pci_enum_done() - send PMC IPC to inform both BIOS Reset
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* and PCI enumeration is done.
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*/
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void pmc_send_bios_reset_pci_enum_done(void);
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/* Forward declare the power state struct here */
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struct chipset_power_state;
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@ -24,6 +24,7 @@
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#define PMC_IPC_BIOS_RST_COMPLETE 0xd0
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#define PMC_IPC_BIOS_RST_SUBID_PCI_ENUM_DONE 0
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#define PMC_IPC_BIOS_RST_CMPL_STS_PCI_ENUM BIT(0)
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static struct chipset_power_state power_state;
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@ -854,12 +855,13 @@ enum pch_pmc_xtal pmc_get_xtal_freq(void)
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}
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}
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void pmc_send_pci_enum_done(void)
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void pmc_send_bios_reset_pci_enum_done(void)
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{
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struct pmc_ipc_buffer req = { 0 };
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struct pmc_ipc_buffer rsp;
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uint32_t cmd;
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req.buf[0] = PMC_IPC_BIOS_RST_CMPL_STS_PCI_ENUM;
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cmd = pmc_make_ipc_cmd(PMC_IPC_BIOS_RST_COMPLETE,
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PMC_IPC_BIOS_RST_SUBID_PCI_ENUM_DONE, 0);
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if (pmc_send_ipc_cmd(cmd, &req, &rsp) != CB_SUCCESS)
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@ -32,8 +32,8 @@ static void pmc_lockdown_cfg(int chipset_lockdown)
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PM_CFG_XRAM_READ_DISABLE);
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}
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/* Send PMC IPC to inform about PCI enumeration done */
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pmc_send_pci_enum_done();
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/* Send PMC IPC to inform about both BIOS Reset and PCI enumeration done */
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pmc_send_bios_reset_pci_enum_done();
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}
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static void soc_die_lockdown_cfg(void)
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