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mb/siemens/mc_apl1: Fix wrong register masking 

With the previous instruction the complete register was set to '0'.
Correctly, only the bits 23:16 must be masked.

Change-Id: Idd6e70dcb42c69cf3bc5d36db993e6def52eba58
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76177
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
This commit is contained in:
Mario Scheithauer 2023-06-29 11:46:05 +02:00 committed by Felix Held
parent 15e1d97463
commit fef762f613
1 changed files with 3 additions and 2 deletions
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5
src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
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@ -12,6 +12,7 @@
#include <types.h> #include <types.h>
#define TX_DWORD3_P1 0xa8c #define TX_DWORD3_P1 0xa8c
#define TX_SWING_MASK 0x00ff0000
void variant_mainboard_final(void) void variant_mainboard_final(void)
{ {
@ -42,10 +43,10 @@ void variant_mainboard_final(void)
/* /*
* Correct the SATA transmit signal via the High Speed I/O Transmit * Correct the SATA transmit signal via the High Speed I/O Transmit
* Control Register 3 on SATA port 1. * Control Register 3 on SATA port 1.
* Bit [23:16] set the output voltage swing for TX line. * Bit [23:16] sets the output voltage swing for TX line.
* The value 0x4a sets the swing level to 0.58 V. * The value 0x4a sets the swing level to 0.58 V.
*/ */
pcr_rmw32(PID_MODPHY, TX_DWORD3_P1, (0x00 << 16), (0x4a << 16)); pcr_rmw32(PID_MODPHY, TX_DWORD3_P1, ~TX_SWING_MASK, 0x4a << 16);
} }
static void finalize_boot(void *unused) static void finalize_boot(void *unused)