GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

google/glados: enable VMX for all variants 

Explicitly enable VMX, as some OSes (eg, Windows) need VMX
feature enabled and locked in order to fully support virtualization

Test: boot Windows 10 on google/chell, verify OS reports virtualization
enabled

Change-Id: I53ff575755a9ca376dbf953db96191c17bf57f5f
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27549
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Matt DeVillier 2018-07-16 20:16:29 -05:00 committed by Martin Roth
parent bba1ee070d
commit fefd8e7fde
7 changed files with 7 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/google/glados/variants/asuka/devicetree.cb
View File

@ -44,6 +44,7 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "3" # 4s
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
register "VmxEnable" = "1"
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"

1
src/mainboard/google/glados/variants/caroline/devicetree.cb
View File

@ -54,6 +54,7 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "1" # 500ms
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
register "VmxEnable" = "1"
# TCC offset
register "tcc_offset" = "10"

1
src/mainboard/google/glados/variants/cave/devicetree.cb
View File

@ -54,6 +54,7 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "1" # 500ms
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
register "VmxEnable" = "1"
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"

1
src/mainboard/google/glados/variants/chell/devicetree.cb
View File

@ -54,6 +54,7 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "1" # 500ms
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
register "VmxEnable" = "1"
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"

1
src/mainboard/google/glados/variants/glados/devicetree.cb
View File

@ -54,6 +54,7 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "1" # 500ms
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
register "VmxEnable" = "1"
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"

1
src/mainboard/google/glados/variants/lars/devicetree.cb
View File

@ -42,6 +42,7 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "3" # 4s
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
register "VmxEnable" = "1"
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"

1
src/mainboard/google/glados/variants/sentry/devicetree.cb
View File

@ -44,6 +44,7 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "3" # 4s
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
register "VmxEnable" = "1"
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"