Commit Graph

1412 Commits

Author SHA1 Message Date
Stefan Reinauer a9f670a760 ifdtool: Use perror for file write errors
The "Error while writing." error messages did not output a new line
which made the output look weird. With this patch, it should look like
this:

$ ifdtool -x 3rdparty/mainboard/google/parrot/descriptor.bin
File 3rdparty/mainboard/google/parrot/descriptor.bin is 4096 bytes
Found Flash Descriptor signature at 0x00000010
Flash Region 0 (Flash Descriptor): 00000000 - 00000fff
Flash Region 1 (BIOS): 00200000 - 007fffff
Error while writing: Bad address
Flash Region 2 (Intel ME): 00001000 - 001fffff
Error while writing: Bad address
Flash Region 3 (GbE): 00fff000 - 00000fff (unused)
Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused)

Change-Id: I784ff72d0673f167dbf0bd10921406abd685ce72
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1299
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2012-07-24 10:13:33 +02:00
Anton Kochkov 59b36f1026 msrtool: Factor out cpuid() from target probe functions into main()
Almost all probe functions called cpuid(). Those calls are replaced
by a single cpuid() call in main() and a new parameter to the target
probe functions with the cpuid() result.

The vendor_t and struct cpuid_t definitions are moved closer to the
top of msrtool.h and the vendor_t enum is reformatted to simplify
addition of further values.

Change-Id: Icd615636207499cfa46b8b99bf819ef8ca2d97c0
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/1259
Tested-by: build bot (Jenkins)
2012-07-21 17:35:46 +02:00
Anton Kochkov c7fc4422a0 inteltool: Add support for H65 Express chipset
Added few MCH and DMI registers for H65E.
Description of them can be found at
"2nd Generation Intel Core Processors
Family datasheet"

Change-Id: If4fee35bb5a09b04ea0684be9cbd3c1e9084b934
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1258
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-21 16:06:41 +02:00
Patrick Georgi 116327ee06 sconfig: typo fix
eliminate printf format warning.

Change-Id: I51f75a259d28c5de788f57c3d720b76ca638e330
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1248
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-07-20 13:11:46 +02:00
Mathias Krause 41c229c029 cbfstool: signed vs. unsigned fixes
Use the right data types to fix compiler warnings.

Change-Id: Id23739421ba9e4a35599355fac9a17300ae4bda9
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/1236
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-07-18 00:15:35 +02:00
Mathias Krause 5c581c4d6c cbfstool: provide a prototype for remove_file_from_cbfs
To complement commit e1bb49e (Add a "remove" command to cbfstool) and
fix a compiler warning provide a prototype for remove_file_from_cbfs.

Change-Id: Ied8eac956de5fed3f9d82ce1e911ee1fec52db15
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/1235
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-07-18 00:15:27 +02:00
Mathias Krause d2567c8d92 cbfstool: make endian detection code more robust
Accessing the memory of a char array through a uint32_t pointer breaks
strict-aliasing rules as it dereferences memory with lower alignment
requirements than the type of the pointer requires. It's no problem on
x86 as the architecture is able to handle unaligned memory access but
other architectures are not.

Fix this by doing the test the other way around -- accessing the first
byte of a uint32_t variable though a uint8_t pointer.

Change-Id: Id340b406597014232741c98a4fd0b7c159f164c2
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/1234
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-07-18 00:15:15 +02:00
Patrick Georgi 2b108a4368 sconfig: fix up shipped code
The lex compile wasn't current (or something) and so INTA wasn't lexed
properly.

Change-Id: I5a760430788792f54c4e1e0d419b8dd525079d15
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1226
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-07-13 20:27:28 +02:00
Christian Gmeiner 42b808e889 msrtool: add support for cs5536 LPC_SERIRQ (0x5140004e)
This register is helpful for porting new mainboards based on
cs5536 southbridge.

Change-Id: Iff3adc2c2fbc672c8541096756f95b3322f6ab19
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-on: http://review.coreboot.org/1211
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-13 08:40:14 +02:00
Sven Schnelle 0fa50a1990 MPTAPLE: generate from devicetree.cb
This patch adds support for autogenerating the MPTABLE from
devicetree.cb. This is done by a write_smp_table() declared
weak in mpspec.c. If the mainboard doesn't provide it's own
function, this generic implementation is called.

Syntax in devicetree.cb:

ioapic_irq <APICID> <INTA|INTB|INTC|INTD> <INTPIN>

The ioapic_irq directive can be used in pci and pci_domain
devices. If there's no directive, the autogen code traverses
the tree back to the pci_domain and stops at the first device
which such a directive, and use that information to generate the
entry according to PCI IRQ routing rules.

Change-Id: I4df5b198e8430f939d477c14c798414e398a2027
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1138
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-13 08:38:13 +02:00
Guenter Roeck 21856eec59 superiotool: Dump data registers for Nuvoton chips
Add support to dump all data registers for Nuvoton chips (NCT6775F, NCT6776F,
and NCT6779D). Register contents will be dumped if the -e option is provided on
the command line.

Change-Id: I2b425b48c1f28a10ff3c1ca1d7f21c501eff74ad
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1150
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-12 08:13:21 +02:00
Guenter Roeck a89da0969e superiotool: Add support for function to dump superio chip data registers
Add new function dump_data() to dump a bank of superio data registers.

Change-Id: I13a58d87c14d319cfcdea1ec1d54c2b110d90f9f
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1149
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-12 08:13:13 +02:00
Guenter Roeck 975ffc2e0f superiotool: Add support for NCT6775F(A/B) and NCT6779D
Change-Id: I66667fcb58f6885460021f4a2024d6ba56b95f11
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1148
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-12 08:10:28 +02:00
Anton Kochkov 54c07a675b msrtool: Add Intel Nehalem CPUs support
Added Intel processors based on Nehalem
architecture support, with decoding MSRs.

Change-Id: I576d5eac2542c0b62852bf05e42bc98b134c7eae
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1170
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-07-10 00:57:35 +02:00
Anton Kochkov ffbbecc9ee msrtool: Fix Intel CPUs detection
Added vendor check in sys.c file and fixed models checking
in intel targets files.

Change-Id: I1ce52bbce431dea79e903d6bc7a12e5b9ad061be
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1169
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-07-10 00:56:49 +02:00
Raymond Danks e1e6a91ce0 mkelfimage: pkgdata directory created but never used
Remove superfluous pkg* definitions and installation of a target
directory directory that is never used.

Change-Id: I2addf3f316230cdd428def5889fd3beb7c40f422
Signed-off-by: Raymond Danks <ray.danks@se-eng.com>
Reviewed-on: http://review.coreboot.org/1195
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-07-09 22:18:37 +02:00
Sven Schnelle 56dfc7c684 inteltool: fixup intel 5000 chipset pci ids
Change-Id: I2cd1dac0dd9a5da1000a3ffa3e1c8ee4c5c8ba43
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1175
Tested-by: build bot (Jenkins)
2012-07-06 16:40:46 +02:00
Guenter Roeck 3397ceff7b superiotool: Add support for git-based version number
The superiotool Makefile extracts a version string from SVN. This does not work
with a git repository, and results in an empty version string. Use the output of
'git describe' as version string instead.

Change-Id: Idf92c02753b28ef5bcdd3b6df4a08d79ae974434
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1151
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-06 10:21:03 +02:00
Sven Schnelle efb479c08b ROMCC: fix unused attribute lookup
commit 57cd1dd296 added this attribute,
but with wrong length, so it actually never matched.

Change-Id: Ibcc7816b5fa895faa66710cc29de38f129be6a2b
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1133
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
Reviewed-by: Mathias Krause <minipli@googlemail.com>
2012-06-22 09:19:37 +02:00
Stefan Reinauer 57cd1dd296 Teach romcc about attribute((unused))
This makes it easier to use the same code on romcc and gcc.
Specifying attribute((unused)) on romcc does nothing.

Change-Id: If9a6900cad12900e499c4b8c91586511eb801987
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1132
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
2012-06-22 03:29:21 +02:00
Sven Schnelle 69eab16ce6 mptable: realign comments with code
Change-Id: I4bc90334c7220512607cd5e777ce1f8cc595e2f0
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1115
Tested-by: build bot (Jenkins)
2012-06-20 12:46:55 +02:00
Sven Schnelle 2f8c4f829e mptable: initialize apic/bus arrays with ARRAY_SIZE
and increase the busses size to 32, as 16 isn't enough one some
systems (i5000 for example)

Change-Id: Ie09f451dd82ac25b0de85fd47807136e01da737b
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1114
Tested-by: build bot (Jenkins)
2012-06-20 12:46:39 +02:00
Sven Schnelle 2fcc166fb8 mptable: pretty print PCI INT entries
make it more readable by adding INT defines and a left shift.

Change-Id: I7db4d8c71ab4d705833019aa4cc2f11cef7d4fee
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1113
Tested-by: build bot (Jenkins)
2012-06-20 12:46:28 +02:00
Sven Schnelle 4fbcaecf9a mptable: Fix BUS type determination
Change-Id: I7268b35671f6629601fa3b2a589054b8c5da5d78
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1112
Tested-by: build bot (Jenkins)
2012-06-20 11:07:51 +02:00
Sven Schnelle b00c9a2257 mptable: reindent code to comply with coreboot coding style
Change-Id: Iee27c535f56ebedaceea542c2919cde68006827c
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1111
Tested-by: build bot (Jenkins)
2012-06-20 10:36:33 +02:00
Sven Schnelle 09a180230a mptable: Fix 'mptable.c:1019:12: warning: ‘c’ may be used uninitialized in this function'
Change-Id: Icf6968f5bcbbe28c3a2a1d6ee7c1fd0be583f182
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1110
Tested-by: build bot (Jenkins)
2012-06-20 10:20:48 +02:00
Sven Schnelle 57f524fd62 mptable: remove unused variable
Change-Id: I1ff7e040b5aafcdb05a3669158ae94551981e747
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1109
Tested-by: build bot (Jenkins)
2012-06-20 09:44:18 +02:00
Sven Schnelle 9b860165ba mptable: print ioapic entries
Print IOAPIC entry based on actual data, instead of giving the user
the feeling that the generated ioapic entry has any relation to reality.
If the IOAPIC entry in the MPTABLE is incorrect, the user will notice
it anyways. But adding a static entry (which might be also incorrect)
is even worse.

Change-Id: I6d0012324a9e6c7d22436ada36cbd3a4f7166f5c
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1108
Tested-by: build bot (Jenkins)
2012-06-20 09:43:43 +02:00
Sven Schnelle 0b879f838f mptable: rename LAPIC_ADDR to LOCAL_APIC_ADDR
It was renamed in coreboot, so have mptable generate correct code.

Change-Id: I9579209f9f47b756d8ccab63b6f942d22d53d79d
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1107
Tested-by: build bot (Jenkins)
2012-06-20 09:38:01 +02:00
Raymond Danks c95da25ac6 Improve parsing of --cpu parameter in abuild script.
* -c "" need never be tested if getopt params are handled; fail abuild script when getopt parsing fails
* use expr to resolve numeric test fails with -c max
* cpus variable may be being passed in the environment.  Don't overwrite MAKEFLAGS if it is not.

Change-Id: I96236ef719a1a9f942b8e15bfcf015d60068e58a
Signed-off-by: Raymond Danks <ray.danks@se-eng.com>
Reviewed-on: http://review.coreboot.org/1068
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-06-04 16:19:45 +02:00
Patrick Georgi 2dbfcb750f sconfig: Some fixes
clang complained about a missing include and wrong fprintf use.

Change-Id: Idc023b653e694147c624d5f8f9ed3b797c462e9f
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1067
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-05-30 19:43:01 +02:00
Stefan Reinauer 9981cad801 nvramtool: use C99 PRIx64 / PRId64 for uint64_t variables
In printf/printk, using %lld or %ld for uint64_t will warn on either
64bit or 32bit machines.  However, C99 defines PRIx64 / PRId64 to
provide the right modifiers for printing uint64_t variables. Use them
instead.

Change-Id: I68df5d069a1e99d1a75885173ddfd7815197afea
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1053
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-05-25 08:01:37 +02:00
Stefan Reinauer 1b1309f289 Add EM100 mode to Intel Firmware Descriptor tool
To avoid having two copies for every firmware descriptor (one for
EM100 use and one for real SPI flash use), add an EM100 mode to
ifdtool that allows to "dumb down" a fast image to the settings
required for the EM100 to work.

Change-Id: I0ed989f0a49316bc63d8627cb5d4bd988ae7a103
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1039
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-24 22:22:24 +02:00
Stefan Reinauer 89ba15a0c1 chromeos: Fix compilation of coreboot-utils package
The ChromeOS build system provides a set of CXXFLAGS, however those do
not contain -DCOMPACT. This breaks the compilation of cbfstool in
coreboot-utils.

This fix overrides CXXFLAGS so that coreboot-utils compiles again.

Change-Id: If9495bdd815fe2cdaeba5386afa953558742467b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1038
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-24 22:22:12 +02:00
Patrick Georgi 92ff934e0b abuild: Disable abuild-level parallelism for now
It still failed because make touches files it isn't
supposed to touch.

Change-Id: I5a6ceaa9d5da212c1e34b121cf39fa9d27964747
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1037
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-05-24 18:09:17 +02:00
Patrick Georgi 5fb2b5cdac crossgcc: Test for m4 and bison
Happened way too often that crossgcc failed
because m4 or bison wasn't installed already.

Change-Id: Ibcca2183edd5db20608015e3898f8fff9a6d11e8
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1026
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-14 18:33:41 +02:00
Patrick Georgi 6e61ad347c crossgcc: update sources
Update GNU project versions, download GNU project tarballs
using ftpmirror.gnu.org (http, picking close servers).

Update ACPICA tarballs, ignore https certificates for all
downloads. Not very useful, but breaks ACPICA download.

Change-Id: I4aa8b08836346d031793a006b20b741d86e48988
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1025
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Raymond Danks <ray.danks@se-eng.com>
2012-05-14 18:33:35 +02:00
Patrick Georgi 64d9a7784e abuild: Move configuration handling together
Handling user options was spread out across the code.
Collect as much as possible in the getopt loop.

Change-Id: I4979a14988da000c008e155023b960535b529b41
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1028
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-14 18:33:26 +02:00
Patrick Georgi 2ea8e86856 abuild: Remove abuild.info hack
abuild used to allow boards to override certain environment
variables using a file called abuild.info.
This isn't used, this isn't needed. Drop it.

Change-Id: Ic93748f602bf0c354ff1f3be25a050e1cb469256
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1027
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-14 18:33:20 +02:00
Patrick Georgi 43105d6a5a abuild: Build boards in parallel if possible
Determine if xargs -P works. If yes, use that to build multiple
boards in parallel, instead of relying on make -j X, when doing
a full abuild run (instead of single boards).

make -j X isn't able to make use of several cores at various
serialization points in our build process, so this change results
in a >25% speed up for a full abuild run in my tests.

Change-Id: Id484a4211c84a3a24115278e0fbe92345f346596
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/409
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-05-10 22:11:16 +02:00
Stefan Reinauer 564e90f571 Add a tool to work on i915 hardware in user mode
This is the beginning of a tool that transforms the i9x5 code to user
mode code. Consider this a very early stage although it does produce
two programs. Requires spatch 1.0 or greater.

To try it out, assuming you have an up-to-date spatch,
   sh transform
   make
   make broken

Please don't fall to the temptation to auto-magicize this process.
It's primitive for a reason. That said, suggestions welcome of course.

Change-Id: I0188e36637b198b06c17f6d3c714d990e88bd57d
Signed-off-by: Ronald G. Minnich <rminnich@chromium.org>
Reviewed-on: http://review.coreboot.org/1003
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-08 00:40:36 +02:00
Patrick Georgi 44a89b34f8 Fix build with CMOS support on various platforms
When bringing in nvramtool as build_opt_tbl replacement,
various platforms where left in the cold that don't
provide direct IO support from userland (or at least not
in a way we support).

Build nvramtool without CMOS support when done as part of
a coreboot build. We don't need to touch CMOS in this case.

Change-Id: Icc88d1d32f10384867a5d44b065f9aa119bb0d50
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/983
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-05-08 00:40:01 +02:00
Patrick Georgi e204e2ae87 lint: Avoid downloading blobs repository
The stable lint test "build-dir-handling" ran the build system
in a way that made it download the blobs repository. Since this
is part of the pre-commit hook, this might have kicked in with
users desiring not to have them.

Change-Id: I44a00137352c5966ff7fe2a030673276f6803908
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/999
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-04 01:54:02 +02:00
Patrick Georgi bea8421145 abuild: Add option to use binary files
abuild -B enables the use of the blob repository.

Change-Id: I2dd823d3b024ad249d72d668657bf6a6e92145cf
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/958
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2012-05-01 00:28:01 +02:00
Raymond Danks a293714579 nvramtool: Allow build under Cygwin
To build under Cygwin, nvramtool depends upon the package ioperm:
http://openwince.sourceforge.net/ioperm/

for sys/io.h and sys/perm.h.  This change causes the nvramtool make to correctly include and link against these headers and libraries.

Change-Id: If6cd9d324de7bc19830e0018844f42761b28ddd3
Signed-off-by: Raymond Danks <ray.danks@se-eng.com>
Reviewed-on: http://review.coreboot.org/940
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-29 18:27:30 +02:00
Raymond Danks 51b8f05ab3 ectool: Allow build under Cygwin
To build under Cygwin, ectool depends upon the package ioperm:
http://openwince.sourceforge.net/ioperm/

for sys/io.h and sys/perm.h.  This change causes the ectool make to correctly include and link against these headers and libraries.

Change-Id: I7d54ab5110c2bb1fd21dfa48d56031f3f29cd54e
Signed-off-by: Raymond Danks <ray.danks@se-eng.com>
Reviewed-on: http://review.coreboot.org/941
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-28 02:46:54 +02:00
Patrick Georgi 770c44d20f Drop build_opt_tbl
It's gone from the build. Drop the code as well.

Change-Id: Ice6fcb39565273360a576bda4826f16088f4666c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/914
Tested-by: build bot (Jenkins)
Reviewed-by: Vikram Narayanan <vikram186@gmail.com>
2012-04-22 10:23:48 +02:00
Vikram Narayanan a8111cf980 nvramtool: Unify nvramtool and build_opt_tbl
As cmos.layout parsing capabilities are already there in nvramtool,
use those than using build_opt_tbl.c. Add binary and header file
generation in nvramtool. Make appropriate changes to Makefile.inc.

Change-Id: Iaf3f5d4f51451aeb33c92800a0c895045f2388cf
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Reviewed-on: http://review.coreboot.org/898
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-04-21 09:36:24 +02:00
Patrick Georgi c3fc4b9337 nvramtool: Allow spaces in enumeration names
Change-Id: Id526e74f06fb15d4692d7b6edc8b5863f2d42c50
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/901
Tested-by: build bot (Jenkins)
2012-04-21 09:35:10 +02:00
Patrick Georgi 210fa302a3 lint: tighten whitespace check some more
Don't test executable files nor object files, even if the former might
render the test useless on win32 (executable bit isn't well defined there).

Change-Id: Ifb6fc83243289d266f439316c14b6b009f8da5fc
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/890
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-04-17 21:40:45 +02:00