Stefan Reinauer
26ba091d51
inteltool: match cpuid before attempting to print MSRs (trivial)
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3514 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-18 10:58:09 +00:00
Uwe Hermann
710e8b1ad0
Initial support for the Intel 82845 (Brookdale) and ICH2 (trivial).
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Tested on hardware:
Intel Northbridge: 8086:1a30 (i845)
Intel Southbridge: 8086:2440 (ICH2)
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3333 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-17 21:33:35 +00:00
Uwe Hermann
9a6b6b51df
Cosmetics, whitespace, coding style, partially ident-aided (trivial).
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-14 21:20:55 +00:00
Stefan Reinauer
f9b99450ce
add ICH7-M and ICH7 DH to inteltool (trivial)
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-14 20:05:00 +00:00
Stefan Reinauer
9f7af6ef40
trivial patch: move maintainable parts to the top and add ICH7-M DH southbridge
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-14 14:22:59 +00:00
Stefan Reinauer
d466e6a874
trivial patch to fix options. Thanks to Uwe Hermann for the hint!
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3311 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-14 13:52:50 +00:00
Stefan Reinauer
b69e46bca3
Example on how to add other chipsets to inteltool. ICH/ICH0, ICH4(-M) and ICH7
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have different register meanings, so they get their own lookup tables.
This is a trivial patch.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-14 11:38:22 +00:00
Stefan Reinauer
03646bebbe
Add new revised inteltool that dumps all kinds of chipset information and drop old
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gpio_dump utility.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-13 22:14:21 +00:00