Commit Graph

12 Commits

Author SHA1 Message Date
Arthur Heymans 128205fd08 autoport/bd82x6x.go: Improve gpio.c generation
This generates better gpio.c files where structs are initialised as
static to be able to drop some entries since those would be
initialised as 0.
This makes these files less cluttered since only relevant things are
shown:
* GPIO direction, level, invert, blink depend on GPIO mode
* GPIO level is read only on input
* GPIO invert is only valid on input
* only show when GPIO are inverted, blinking, reset by RSMRST#

Change-Id: I83382d38a4a3b7ed11b8e7077cc5fbe154e261a7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19508
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-10-06 13:48:12 +00:00
Nico Huber e48b3db519 util/autoport: Remove copy-pasting of PMIR register
AFAIR from reviews, writing the PMIR (aka. ETR3) register never turned
out to do anything useful.

Change-Id: I119fb1212f360a59b695e2dfef68e19c330d01ca
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20817
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-31 15:00:43 +00:00
Patrick Rudolph 0a4a4f7ae4 mb/*/mainboard.c: Get rid of SPI AFC register
The AFC—Additional Flash Control Register is set by
southbridge code.

Remove redundant calls and get rid of it in autoport.

Change-Id: I627082e09dd055e3b3c4dd8e0b90965a9fcb4342
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19493
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-05-01 14:02:19 +02:00
Kyösti Mälkki 4015608ed7 autoport: Fix romstage generator
Prototype changed here:
   e258b9a intel sandy/ivy: Improve DIMM replacement detection

Change-Id: Id79238db2e497b9163f3bd1b1d5d4bc11fe4da9e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17711
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-12-07 23:30:16 +01:00
Stefan Reinauer eb960f1af9 util/autoport: Use common gpio.c for bd82x6x
In accordance to change I8bd981c4696c174152cf41caefa6c083650d283a
change autoport as well, as suggested by Vladimir.

Change-Id: I7cdaa779c11fd3f791a3ad213c24d927b5da76b9
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13731
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2016-02-18 01:45:56 +01:00
Vladimir Serbinenko ffbb3c0b8a Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Change-Id: I11e09804ed1d8a7ae8b8d4502bd18f6be933f9fa
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13656
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-12 04:20:57 +01:00
Vladimir Serbinenko 609bd9445e ivy: Add a possiblity for mainboard early init.
This is needed for stout EC init.

Change-Id: I5c73499c17763229840152a473a2d820802ee2f6
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13535
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-09 20:35:40 +01:00
Vladimir Serbinenko 6b2d83c352 autoport: Add missing casts
Change-Id: I04abdd48f5e2440756f9b03041d46c773f200368
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/12890
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-01-11 20:51:12 +01:00
Vladimir Serbinenko 42d55e0caf sb/intel/bd82x6x: Add missing PCIIDs for variants .
Change-Id: I917b8167a028aa9412b0cc6dedf8f09a1d1fae7f
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/12820
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-01-03 21:22:41 +01:00
Stefan Reinauer f2ccc4314e autoport: Include 'default_irq_route.asl' into DSDT
After commit with Change-Id Ia1839ed3 (sandy/ivy: Include
IRQ routes from platform), update autoport to include
that file into the DSDT.

Change-Id: I14534438d0b433895f384539c8b413eaa53d943a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10612
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-06-24 02:02:48 +02:00
Vladimir Serbinenko 68f5f62fca autoport/bd82x6x: Fix off-by-one error
Change-Id: Ibd5c8a1364ab183f72e12cc9b450a36200fe3fde
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10371
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-30 13:52:48 +02:00
Vladimir Serbinenko 3129f792f7 autoport: Write autoport together with porting guide for sandy/ivybridge.
This should be able to generate bootable ports for sandy/ivy, possible with
minor fixes. Howto is in readme.md

Change-Id: Ia126cf0939ef2dc2cdbb7ea100d2b63ea6b02f28
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7131
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-29 11:26:29 +02:00