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Author SHA1 Message Date
Ed Swierk
1a7a5b49c5 Apply linuxbios-rename-compressed-payload-options.patch, refs #14 
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2527 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-12-15 11:42:16 +00:00
Stefan Reinauer
ca6312010d * fix the automatic build system by compressing payloads if possible 
and leaving enough room for a real payload (not /dev/null)

  This is a wonderful example why "uses" sucks.

* add Config-abuild.lb for those boards that dont build with 
  the default settings and a real payload:
  arima/hdama, amd/quartet, amd/serengeti_cheetah, ibm/e326

* if lzma is installed and a real payload is used, try compressing
  it. 

* fix a small bug in "abuild --help"

This patch is acked by me because its due to infrastructural changes only.
Flames welcome.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-11-10 13:30:28 +00:00
Uwe Hermann
a7aa29b943 Use the canonical name of the vendors/devices and the 
same format for all CHIP_NAME() entries in LinuxBIOS (Closes #20).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@linuxbios.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-11-05 18:50:49 +00:00
Uwe Hermann
9c33b7b81e Remove some unneeded #includes from most mainboard.c files. 
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> 
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2485 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-11-02 14:11:34 +00:00
Uwe Hermann
e0e1d42527 Fix the CHIP_NAME() entries of all mainboards to have the same format 
and (hopefully) the correct canonical name of the vendor and board.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-10-27 11:30:27 +00:00
Yinghai Lu
197a4a8dbb MEMCLK to DDRXXX 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-10-06 16:05:14 +00:00
Yinghai Lu
7110f9261f K8_4RANK to QRANK 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-10-05 06:59:56 +00:00
Yinghai Lu
6d74d76de4 get_bus_cong using sysconf instead 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-10-04 23:57:49 +00:00
Yinghai Lu
d4b278c02c AMD Rev F support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-10-04 20:46:15 +00:00
Stefan Reinauer
792ebfecd3 closing issue 44: rename ram clocks in cmos.layout 
https://openbios.org/roundup/linuxbios/issue44



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-19 14:26:41 +00:00
Yinghai Lu
7ac38a33f6 don't wait core0 started twice 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-04 01:05:22 +00:00
Yinghai Lu
9a791dffea new cache_as_ram support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-03 20:38:34 +00:00
Yinghai Lu
968bbe89cd use hcdn to simplify the mptable.c and irqtable.c --- patch fro issue 
48


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-06 23:34:09 +00:00
Stefan Reinauer
373511b2f9 issue 41 - fix up motherboard compilation. There's always hope. 
1201_ht_bus0_dev0_fidvid_mb.diff part 1



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-02 23:16:01 +00:00
Stefan Reinauer
806e146e75 Applying 11_26_car_tyan.diff from Yinghai Lu. 
NOTE: This will break the tree so it can be fixed up later



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-01 10:54:44 +00:00
Jason Schildt
737253bf12 - See Issue Tracker id-15 "lnxi-patch-15". 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-10-25 21:50:06 +00:00
Jason Schildt
f274d94360 - See Issue Tracker id-13 "lnxi-patch-13". 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-10-25 21:46:09 +00:00
Jason Schildt
fddf46f275 - See Issue Tracker id-12 "lnxi-patch-12". 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-10-25 21:45:17 +00:00
Yinghai Lu
13f1c2af8b eric patch 
1. x86_setup_mtrr take address bit.
        2. generic ht, pcix, pcie beidge...
        3. scan bus and reset_bus
        4. ht read ctrl to decide if the ht chain
           is ready
        5. Intel e7520 and e7525 support
        6. new ich5r support
        7. intel sb 6300 support.

yhlu patch
	1. split x86_setup_mtrrs to fixed and var
	2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
	3. in_conherent.c K8_SCAN_PCI_BUS


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-08 02:49:49 +00:00
arch import user (historical)
59140ccdf3 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-61 
Creator:  Yinghai Lu <yhlu@tyan.com>

write_pirq_routing_table for x86


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:35 +00:00
arch import user (historical)
7dec0f9ac3 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-56 
Creator:  Yinghai Lu <yhlu@tyan.com>

remove junk in s2885 cache_as_ram_auto.c 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:06 +00:00
arch import user (historical)
93cabf12d1 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-53 
Creator:  Yinghai Lu <yhlu@tyan.com>

more safe stack in ram for cache_as_ram


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:17:39 +00:00
arch import user (historical)
6ca7636c8f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51 
Creator:  Yinghai Lu <yhlu@tyan.com>

cache_as_ram for AMD and some intel


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:17:25 +00:00
arch import user (historical)
ef03afa405 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34 
Creator:  Yinghai Lu <yhlu@tyan.com>

AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:15:30 +00:00
arch import user (historical)
ca0084ef9b Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-9 
Creator:  Yinghai Lu <yhlu@tyan.com>

rm tyan VERSION


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:49:56 +00:00
arch import user (historical)
72c3b053d8 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-7 
Creator:  Yinghai Lu <yhlu@tyan.com>

ide_enable in MB Config and jmp_auto ( it will make start in the 64k boundary) 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:49:52 +00:00
Yinghai Lu
b5d9af4105 move apic cluster before pci_domain in MB Config.lb 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-21 22:02:09 +00:00
Li-Ta Lo
af02157530 add config option for vga 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-19 20:38:09 +00:00
Yinghai Lu
3a23863a3a nodeid 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-10 22:20:51 +00:00
Li-Ta Lo
31ce35e8ab remove ti_firewire.c, it only enable the bus master 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-07 04:50:33 +00:00
Yinghai Lu
2c956bbc19 non coherent ht chain setup automatically 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1824 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-17 21:08:16 +00:00
Yinghai Lu
845e8df673 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-03 19:07:45 +00:00
Yinghai Lu
7213d0f513 i2c mux support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-12-03 03:39:04 +00:00
Li-Ta Lo
f0ee1efcaf marked debug device on LPC bus 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1798 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-25 17:35:37 +00:00
Yinghai Lu
ad00d73998 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 22:14:33 +00:00
Yinghai Lu
44b34e31a5 CONFIG_CHIP_NAME to control config chip.h without .name 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 22:03:37 +00:00
Eric Biederman
709850a21b - Ensure every copy of Options.lb uses: 
CROSS_COMPILE
  CC
  HOSTCC
  OBJCOPY


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 10:48:04 +00:00
Eric Biederman
41d0fa38af - Modify all of the Opteron motherboards to have a separate logical 
chip for the amdk8/root_complex


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 07:26:56 +00:00
Yinghai Lu
7bf1b48bd4 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1748 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 03:44:01 +00:00
Yinghai Lu
b2d77282e0 debug device added 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1744 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 22:36:18 +00:00
Yinghai Lu
8085f032f8 SI Class code check 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 21:00:13 +00:00
Li-Ta Lo
2d2bdd3846 removed #if 0 #endif code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1741 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 20:31:04 +00:00
Eric Biederman
018d8dd60f - Update abuild.sh so it will rebuild successfull builds 
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
  enabled.  All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 11:04:33 +00:00
Yinghai Lu
4403f60823 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-03 00:47:40 +00:00
Yinghai Lu
9434c1b661 Tyan update for ROM_IMAGE_SIZE > 64K 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 02:34:28 +00:00
Yinghai Lu
97035448f3 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1725 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-28 18:44:38 +00:00
Yinghai Lu
20fc678d65 spare 4s for restart 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1721 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 02:12:22 +00:00
Yinghai Lu
eefdb03898 S2885 winbond Superio all resource set 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 00:37:30 +00:00
Yinghai Lu
6014983bab add Option.lb 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1694 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-20 17:54:01 +00:00
Yinghai Lu
6a61d6a4ae Tyan update to work with new CPU Config 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-20 05:07:16 +00:00