Commit Graph

4601 Commits

Author SHA1 Message Date
Sean Rhodes 38c99b5659 payloads/tianocore: Rename TianoCore to edk2
coreboot uses TianoCore interchangeably with EDK II, and whilst the
meaning is generally clear, it's not the payload it uses. EDK II is
commonly written as edk2.

coreboot builds edk2 directly from the edk2 repository. Whilst it
can build some components from edk2-platforms, the target is still
edk2.

[1] tianocore.org - "Welcome to TianoCore, the community supporting"
[2] tianocore.org - "EDK II is a modern, feature-rich, cross-platform
firmware development environment for the UEFI and UEFI Platform
Initialization (PI) specifications."

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I4de125d92ae38ff8dfd0c4c06806c2d2921945ab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65820
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-08-13 16:35:18 +00:00
Altamshali Hirani 8915abe115 amdfwtool/amdfwtool.h: Allow 16 additional PSP entries to be supported
Consolidate MAX_BIOS_ENTRIES and MAX_PSP_ENTRIES definitions into one
file

Signed-off-by: Altamshali Hirani <al.hirani@amd.corp-partner.google.com>
Change-Id: Ie3c64a1875010e7fb368967283df6baf1cc7ba8d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62911
Reviewed-by: ritul guru <ritul.bits@gmail.com>
Reviewed-by: Bao Zheng <fishbaozi@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-12 14:16:18 +00:00
Jon Murphy 05208b50c5 util/spd_tools: Rename Sabrina to Mendocino
'Mendocino' was an embargoed name and could previously not be used.
Update amdfwtool for consistency with the correct naming convention.

BUG=b:239072117
TEST=Builds

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I404fcf59e89b75cd2488bcb51981aee2eb4ff0df
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66468
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-12 13:46:48 +00:00
Jon Murphy 9969f4b609 util/amdfwtool: Rename Sabrina to Mendocino
'Mendocino' was an embargoed name and could previously not be used.
Update amdfwtool for consistency with the correct naming convention.

BUG=b:239072117
TEST=Builds

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I673a9b99d207603b605756fc7d277c54c5d0f311
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66467
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-08-11 19:45:20 +00:00
Martin Roth 251e26683e util/lint: Add .gitignore files to list that don't need a license
Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Change-Id: I568a357b40e8bb69b2b26752d241f06adfbe029e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66503
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
2022-08-11 17:53:48 +00:00
Martin Roth f67a1aa76a util/lint & LICENSES: Add PDDC as a "license" for coreboot
The Creative Commons Public Domain Dedication and Certification is not
a license in the common sense in that it's stating that the associated
file is already in the public domain (having no copyright), and is not
actually putting it in the public domain like the CC-C0 license does.

The use for this in coreboot is for unlicensable files - either blank
files or files with no creative content.  This allows these files to
have the SPDX identifier to identify them as having no known copyright
for open source license compliance.

If CC-PDM-1.0 is ever included in the list of SPDX licenses, that would
probably fit better, but because the public domain mark isn't actually
a license, and because "public domain" isn't well defined, CC-PDM was
rejected as a SPDX identifier.

For further information:
https://web.archive.org/web/20201018194411/https://github.com/spdx/license-list-XML/issues/988

Change-Id: Ibb300ecd066cde2a016195c2beca76a460c588e3
Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66496
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2022-08-10 19:07:20 +00:00
Martin Roth afa3e5aa49 util/lint & LICENSES: Add GCC-exception-3.1 to license exceptions
The gcov files in the lib directory are licensed GPL 3.0 with the GCC
runtime library exception.

Add this as a valid license so that the files can get a correct SPDX
identifier.

Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Change-Id: I1cf9c3125592741923c9b4481038055f24fe6ab1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2022-08-10 19:07:02 +00:00
Martin Roth 298b00776a utils: Add initial version of "remove_unused_code" script
This script creates a patch to remove all of the coreboot code that a
platform doesn't use.  This is useful for auditing the codebase for an
individual platform or releasing a platform's code.

Unlike the script that Sage used that did something similar, this keeps
the entire Kconfig tree (Though in a single file), all makefiles that
are required to build, and the standard build tools can still be used.
This will allow for much easier re-integration back into the coreboot
codebase if code is released after running this.

This is just the initial version and more features needed to be added to
make it fully functional.
- It should be able to build multiple configurations to retain the code
for all of those configurations.
- Flag to remove submodules files as well
- Additional variable flags to replace hardcoded values.
- The list of makefiles that need to be kept is pretty long, and could
be updated so that they aren't needed by the top level makefiles.
- Add flag to show changed files
- Show number of files before and after script is run

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Iec69db2ad1358846d649db627b6d60ac8c2204e4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-08-09 19:22:31 +00:00
Karthikeyan Ramasubramanian e5af14ace6 util/amdfwtool: Fix ISH_B directory offset
On boards which use both PSP recovery A/B layout as well as VBOOT A/B
layout, ISH_B directory entry is pointing directly to PSP Level2
directory. This is not correct and either ISH_B should be marked as not
present or it should point to the ISH_A directory itself which in turn
point to PSP L2 directory. Fix it by choosing the latter option.

BUG=None
TEST=Build and boot to OS in Skyrim with PSP verstage.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I0a7a56e98de3f85669ff8ec2fcd1687aa33576a9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66445
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-08-09 16:44:47 +00:00
Subrata Banik 151dcf49a6 util/elogtool: Mark redundant boot mode event type as `deprecated`
This patch adds `_DEPRECATED_` tag to ChromeOS boot mode related event
logging types as below:

* ELOG_TYPE_CROS_RECOVERY_MODE <---- to record recovery boot reason
                                     while booting into recovery mode
* ELOG_TYPE_CROS_DEVELOPER_MODE <--- if the platform is booted into
                                     developer mode.
* ELOG_TYPE_CROS_DIAGNOSTICS <---- if the platform is booted into
                                     diagnostic mode.

Drop static structure `cros_deprecated_recovery_reasons` as it has been
replaced by vb2_get_recovery_reason_string() function.

ELOG_TYPE_FW_BOOT_INFO event type is now used to record all those
related fw boot info along with ChromeOS boot mode/reason etc.

BUG=b:215615970
TEST=Build and boot google/kano to ChromeOS.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I932952ce32337e2d54473667ce17582a90882da8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65802
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-08-06 14:06:33 +00:00
Jakub Czapiga aa41563483 util/cbfstool: Fix truncate command error handling and cbfs_image_from_buffer()
Check return value of cbfs_truncate_space() in cbfs_truncate().
Remove return from cbfs_image_from_buffer() to inform about invalid
image region when incorrect offset header was provided.
Also change header offset provided to mentioned function in
cbfs_expand_to_region() and cbfs_truncate_space() from zero
to HEADER_OFFSET_UNKNOWN, as they do not support images with cbfs master
header.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ib009212692fb3594a826436df765860f54837154
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-08-03 23:24:49 +00:00
Subrata Banik 8b468400f1 util/cbfstool/elogtool: Support logging FW vboot info in elog
List of changes:
1. Add support for new elog event type to log vboot info (type 0xB7).
2. Add support string for fw_slot name, boot status and boot mode.
3. Print fw slot information like FW try count, FW current slot,
    previous FW slot, previous FW boot result and boot mode.

BUG=b:215615970
TEST=Able to build and boot google/kano to OS.
localhost # elogtool list
0 | 2022-07-01 11:10:27 | Log area cleared | 4088
1 | 2022-07-01 11:10:27 | Memory Cache Update | Normal | Success
2 | 2022-07-01 11:10:42 | System boot | 360
3 | 2022-07-01 11:10:42 | Power Fail
4 | 2022-07-01 11:10:42 | SUS Power Fail
5 | 2022-07-01 11:10:42 | ACPI Wake | S5
6 | 2022-07-01 11:10:42 | Wake Source | Power Button | 0
7 | 2022-07-01 11:10:42 | Chrome OS Developer Mode
8 | 2022-07-01 11:10:42 | Firmware vboot info |
                          boot_mode=Developer |
                          fw_tried=B | fw_try_count=0 |
                          fw_prev_tried=B | fw_prev_result=Unknown
9 | 2022-07-01 11:11:42 | System boot | 361
10 | 2022-07-01 11:11:42 | System Reset
11 | 2022-07-01 11:11:42 | Firmware vboot info |
			  boot_mode=Developer |
			  fw_tried=B | fw_try_count=0 |
			  fw_prev_tried=B | fw_prev_result=Success

localhost # crossystem recovery_request=1
localhost # elogtool list
41 | 2022-07-13 12:13:48 | Firmware vboot info |
			  boot_mode=Manual recovery boot |
		          recovery_reason: 0x1/0 (Recovery requested
			  from legacy utility) | fw_tried=A |
			  fw_try_count=0 | fw_prev_tried=A |
			  fw_prev_result=Unknown

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I48b5d54723683cef51e416fc6f58da000507fbcc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65562
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-02 07:06:52 +00:00
Karthikeyan Ramasubramanian 0b4f49c792 util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina
Firmware component that does memory training already limits the memory
controller to train at 5500 Mbps for all memory parts in Sabrina. Hence
removing this interim SPD change to limit the speed.

BUG=b:238074863
TEST=Build and boot to OS in Skyrim.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I2bc82c7407a97aac282708c3e0bd56ae99a8fc31
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66290
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-01 20:30:39 +00:00
Karthikeyan Ramasubramanian 51f914d4a4 util/amdfwtool: Support PSP whitelist file on recovery A/B layout
This is required to enable PSP verstage on SoCs with recovery A/B
layout.

BUG=b:217414563
TEST=Ensure that the concerned type 0x3a PSP entry is present in PSP L2
directory. Build and boot to OS in Skyrim with both PSP and x86
verstage.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I5fae2b5dbcc95a99af3df9f59bb8516280ec1281
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66246
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-08-01 12:34:46 +00:00
Elyes Haouas ae157d38e3 crossgcc: Upgrade LLVM from 13.0.1 to 14.0.6
Test build for QEMU x86 i440fx/piix4.

Change-Id: I97d059947f7049b2491a98985795a4655891c3b3
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-07-30 18:27:30 +00:00
Felix Singer dca8583f17 util/liveiso/common: Install devmem2 and pcimem
devmem2 and pcimem are useful tools which allow working (reading and
writing) with memory mapped IO.

Change-Id: Ifda547b44af3c8e11cd4171a1dfbce3713455303
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66171
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-07-28 18:28:24 +00:00
Karthikeyan Ramasubramanian 234e37099a util/amdfwtool: Update the location of PSP verstage and signing key
On SoCs which use A/B recovery layout, PSP verstage and signing keys are
expected to be present only in PSP L2 directory. Update amdfwtool to
include the PSP verstage and signing key only in PSP L2 directory.

BUG=b:239519603, b:238938623
TEST=Build and boot to OS in Skyrim with PSP verstage.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: Ieeb415be800b7ccf10d6983eb0b567e0a5eaa955
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66128
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-07-26 20:36:04 +00:00
Patrick Georgi a284a36535 util/kconfig: Add README.md documenting the uprev procedure
Change-Id: I2e74f1c5cb1657e11d4f7ea101549329274102db
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57879
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-07-22 19:27:32 +00:00
Karthikeyan Ramasubramanian d5ea355c73 util/spd_tools: Limit memory speed to 5500 Mbps for Sabrina
In Sabrina platform, memory speed is limited to 5500 Mbps. Update the
SPD generation tool to limit to that speed.

BUG=b:238074863
TEST=Build and boot to OS in Skyrim.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: Ie3507898167012e0d812c9b1aacba72e9055fcd8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2022-07-19 15:11:53 +00:00
Elyes Haouas 50eef6566b lint/checkpatch: Add check for used comma where semicolon could be
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I6d3a49378008bad61b2a18bd8cb28be952a18006
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65837
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:48:35 +00:00
Elyes Haouas f9a3554a4a lint/checkpatch: Add a check for use of self-assignments
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: If47a7826ee67a2be25a4caa2a447484e5f11411b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65836
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:48:24 +00:00
Elyes Haouas e83e090b05 lint/checkpatch: Add a check for existence of a commit log
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I4e3b98140d900c5717f4badde71c7be88fd1e23a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:48:13 +00:00
Elyes Haouas 6e84c2ca70 lint/checkpatch: Update 'Check patch "separator" and "signoff"'
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Id3d7375216af5bf75ed7ce61fa8ea2dfebe8ac77
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65834
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:47:59 +00:00
Elyes Haouas cb346842ad lint/checkpatch: Update 'check for unwanted Gerrit info'
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I856bfa0f0d39fda549671b1029cccdc39f831bab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65833
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:47:49 +00:00
Elyes Haouas e235a0de18 lint/checkpatch: Update 'uncoalesced string fragments'
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I21b2a0d87cbf610fc48e273ed78ab779ad4a6932
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65832
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:47:34 +00:00
Elyes Haouas 71bfcf528d lint/checkpatch: Update 'concatenated string without spaces between elements'
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I04e58aca4a30e82f3da0cda08403d0daf3b5fb10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65831
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:47:17 +00:00
Elyes Haouas a59a87ca17 lint/checkpatch: Update 'check indentation of a line with a break'
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I79170a45cd8184ebc816b4f16656a3cfdc257f60
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65828
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:46:40 +00:00
Elyes Haouas d92fcf448f lint/checkpatch: Update 'check for logical continuations'
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I222e3378ded4cd73d0141cd1e38ac3282d311cc4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65827
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:46:22 +00:00
Elyes Haouas 86e4a3ae05 lint/checkpatch: Update 'check for adding lines without a newline'
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bd68e9a6609a3dfa7dc856f24e4b616714d9990
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65826
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:46:09 +00:00
Elyes Haouas c5ede53ba8 lint/checkpatch: Update 'check for assignments on the start of a line'
This reduce the difference with linux v5.19-rc7.

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Ia7d4b0176bad849e79f037f74c3d99ce9eb061c0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19 01:45:55 +00:00
Yu-Ping Wu fcfc572947 util/xcompile/xcompile: Define GCOV_${TARCH}
When payloads analyze the coverage using gcov (or lcov), the gcov
version must match the CC version. Otherwise gcov would fail to parse
the .gcno files.

Therefore, define GCOV_${TARCH} in xcompile, so that payloads don't need
to do tedious string manipulations to find the right gcov path.

Change-Id: If2fc329810c463a3d2c56deaf4e4a3fc3c0a3ed9
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
2022-07-15 05:59:38 +00:00
Bill XIE ac136250b2 commonlib: Substitude macro "__unused" in compiler.h
Since there are many identifiers whose name contain "__unused" in
headers of musl libc, introducing a macro which expands "__unused" to
the source of a util may have disastrous effect during its compiling
under a musl-based platform.

However, it is hard to detect musl at build time as musl is notorious
for having explicitly been refusing to add a macro like "__MUSL__" to
announce its own presence.

Using __always_unused and __maybe_unused for everything may be a good
idea. This is how it works in the Linux kernel, so that would at least
make us match some other standard rather than doing our own thing
(especially since the other compiler.h shorthand macros are also
inspired by Linux).

Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: I547ae3371d7568f5aed732ceefe0130a339716a9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65717
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-07-14 23:08:09 +00:00
Jack Rosenthal f77fa2f7a9 util/spd_tools: Add support for 7500 MT/s lp5 modules
spd_tools does not support LP5x modules yet, and the easiest way to do
this is to add support for 7500 MT/s in lp5.go (reference the comments
on CB:65063).

BUG=b:238674174
BRANCH=firmware-brya-14505.B
TEST=With follow-on CL, run:
     util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I1558d69bc6f28c02c20aa9cd87d4543c1cf52afd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
2022-07-14 21:27:01 +00:00
Subrata Banik 123bcb702a util/spd_tools: Add Intel Meteor Lake (MTL) platform
This patch add support for MTL platform to the `spd_tools`.
This would be useful to create dynamic SPD for rex variants.

BUG=b:224325352
TEST=Able to generate SPD for LP5 DRAM part.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I1db6e3a63d2842c12ef0f256ba1d32b9258670f8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65473
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
2022-07-14 12:50:10 +00:00
Petr Cvek 61f3f33311 Remove executable flag from source codes and text files
Markdown, definition file and sconfig source codes don't need to be
executables. This patch fixes that.

Signed-off-by: Petr Cvek <petrcvekcz@gmail.com>
Change-Id: Ic97d684318c689259f7895e3dfbd552434c3882e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65807
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-07-14 12:46:07 +00:00
Tim Crawford 5c2b5fcf2f util: Allow installing to a build root
Modify util Makefiles to allow installing to a build root specified by
DESTDIR. Allows using the `install` target for packaging.

Change-Id: I3a31ea0fde9922731e1621dcc8f94b2c1326c93c
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60540
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-07-12 22:11:35 +00:00
Paul Menzel 1ff6125af7 util/release/build-release: Use `git log … -1` over `|head -1`
Avoid piping to `head` to print the top line, and do it in `git log`
directly.

Change-Id: Id9b99b06c5bdd9c381bd039fc1914a9a2f332aa6
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64941
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-07-06 19:21:35 +00:00
Jon Murphy c4e90454f4 treewide: Unify Google branding
Branding changes to unify and update Chrome OS to ChromeOS (removing the
space).

This CL also includes changing Chromium OS to ChromiumOS as well.

BUG=None
TEST=N/A

Change-Id: I39af9f1069b62747dbfeebdd62d85fabfa655dcd
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65479
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-07-04 14:02:26 +00:00
Fred Reitberger f36b0138c4 util/amdfwtool: Initalize all variables before use
Not all of the fields of the amd_cb_config structure were properly
initialized. Rather than initialize each field individually, initialize
the entire structure to 0.

TEST: Boot chausie

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: Ia343f01bce3956d66d01ce485b43963193c9df31
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-06-30 19:08:14 +00:00
Elyes Haouas f6abb9ef8d crossgcc: Upgrade CMake from 3.23.0 to 3.23.2
Change-Id: I3613522fa2a958d2a42674f17aa794bdda4ca74a
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63123
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-27 22:21:50 +00:00
Evgeny Zinoviev c3566b67f6 nvramtool: Fix building on Linux systems with musl libc
Current implementation only supports glibc (by looking for __GLIBC__)
and fails to build on systems with alternative libc implementations,
such as musl; sys/io.h is never included, there are no outb/inb
functions which results in undefined references at linking stage.

Using __linux__ instead of __GLIBC__ to test whether the system is Linux
seems to be a more proper way to detect Linux and it also fixes
nvramtool compilation on musl systems.

Tested on Gentoo Linux with musl 1.2.2 (builds and works fine) and Void
Linux with glibc (still builds and works fine).

Change-Id: Idcdc3a033b40f16a6053209813f1e06209ee459a
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48757
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-23 12:19:52 +00:00
Arthur Heymans 0424a2c59f util/ifdtool: Fix printing or setting PCH straps
When printing or setting the PCH straps use the PSL directly instead
of multiplying it by 4.

Change-Id: Ia91697fdf0c6d80502e8611b259c444f39c6cd57
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-06-23 12:17:54 +00:00
Martin Roth 93333cb34e util/lint: Add coreboot specific dictionary file
This is a wordlist that I've compiled to use in spellcheckers to ignore
all of the coreboot specific terms.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I718519000eaf31786380474eb71b99ca442e3bed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64809
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-06-22 21:40:19 +00:00
Arashk Mahshidfar e607ddc5c9 util/inteltool: Add an additional Device ID for Intel HD 4400 GPU
Add 0x0A16 as a Device ID for Intel HD 4400

Change-Id: I0129376c0ce005c1bfabaa9dbd8d8dfc6c92e5d3
Signed-off-by: Arashk Mahshidfar <arashkmahshidfar@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64543
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-06-22 00:51:30 +00:00
Angel Pons bb58c1e438 util/cbfstool: Set `USE_FLASHROM=0` to build vboot
cbfstool does not need to build vboot with flashrom support.

TEST=./util/abuild/abuild -a --timeless -y -c $(nproc) -Z -t hp/280_g2
     no longer fails due to missing libflashrom.h header.

Change-Id: I57edcb1b67baa4c458874b11e9ca0238b4419c46
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65216
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-06-19 18:46:04 +00:00
Edward O'Callaghan 01dbba5e3d util/cbfstool/common.c: Deduplicate buffer_create() logic
BUG=b:207808292,b:231152447
TEST=builds with vboot_ref uprev.

Change-Id: Id7d9b6f5254b08720eebb37151e12ee68ed7f8d7
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65145
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-16 20:38:53 +00:00
Edward O'Callaghan 774dcffc36 util/cbfstool: Decouple elogtool from vboot_ref flashrom code
Currently elogtool sub-proccesses flashrom as calling libflashrom
requires a missing function from the previous flashrom release.
Pending a new release of flashrom we must continue to use subprocess.

However the current subprocess wrapper implementation lives in
vboot_reference which is a git sub-module of coreboot. This causes
all sorts of grief keeping a subprocess ABI stable from vboot_reference
when the rest of vboot_reference builds of HEAD of the flashrom tree
(i.e., using unreleased libflashrom functions). In order to not keep
finding ourseleves in a bind between the two separately moving trees
with different build environments, decouple elogtool with its own
mini copy of flashrom subprocess wrapping logic.

Squash in,
 util/cbfstool/elogtool.c: Convert args into struct in flashrom helper

  vboot signatures for flashrom r/w helpers changed in the upstream
  commit bd2971326ee94fc5. Reflect the change here to allow vboot ref
  and coreboot to realign.

BUG=b:207808292,b:231152447
TEST=builds with vboot_ref uprev.

Change-Id: I04925e4d9a44b52e4a6fb6f9cec332cab2c7c725
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65055
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-06-16 20:38:41 +00:00
Shou-Chieh Hsu 446bacd2f4 util/mb/google: add support for nissa
Add the file template for creating a new variant of Nissa.

BUG=b:229550821

Signed-off-by: Shou-Chieh Hsu <shouchieh@google.com>
Change-Id: I04f75ff91f9851b82641f703ba950b04c22e2e72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64045
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
2022-06-14 00:53:14 +00:00
Felix Singer 3e94068508 util/liveiso: Update to NixOS 22.05
Update configs for NixOS 22.05.

pulseaudio-modules-bt has been abandoned, and is superseded by
pulseaudio's native Bluetooth functionality. Thus, remove it.

Change-Id: Ic3b1dbc3c2ab092b576ba2151c93c74d4f298efc
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64969
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-06-13 20:12:33 +00:00
Nico Huber f9b5665d28 crossgcc/gnat.patch: Add additional gnatlib object files
Newer host versions of gnatbind miss these when building the cross
gnat1 and gnatbind.

Tested with the following host compilers with and without bootstrapping
that the resulting coreboot images of three boards stay the same:
* GCC 4.9.2 (Debian)
* GCC 6.3 (Debian)
* GCC 7.4 (Debian)
* GCC 8.3 (Debian)
* GCC 9.4 (Debian)
* GCC 10.2 (Debian)
* GCC 12.1 (ArchLinux)

Change-Id: I09c6b3cc7b15f1c505acd3ec2c1959b101d6dfb7
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65000
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-06-10 14:09:32 +00:00