Commit graph

22 commits

Author SHA1 Message Date
Stefan Reinauer
0aa37c488b sconfig: rename lapic_cluster -> cpu_cluster
The name lapic_cluster is a bit misleading, since the construct is not local
APIC specific by concept. As implementations and hardware change, be more
generic about our naming. This will allow us to support non-x86 systems without
adding new keywords.

Change-Id: Icd7f5fcf6f54d242eabb5e14ee151eec8d6cceb1
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2377
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-14 07:07:20 +01:00
Patrick Georgi
8cc8468971 Intel: Replace MSR 0xcd with MSR_FSB_FREQ
And move the corresponding #define to speedstep.h

Change-Id: I8c884b8ab9ba54e01cfed7647a59deafeac94f2d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2339
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-11 20:51:33 +01:00
Nico Huber
68d7c7aa8b cpu/intel/model_1067x: Add proper c-state/p-state/thermal support
Change-Id: I853454e8f5617fb7af5dddd7288bdeeacc7b1b8e
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1663
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-06 21:52:44 +01:00
Nico Huber
a74af56dc1 Overhaul speedstep code
This adds proper support for turbo and super-low-frequency modes.
Calculation of the p-states has been rewritten and moved into an
extra file speedstep.c so it can be used for non-acpi stuff like
EMTTM table generation.

It has been tested with a Core2Duo T9400 (Penryn) and a Core Duo T2300
(Yonah) processor.

Change-Id: I5f7104fc921ba67d85794254f11d486b6688ecec
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1658
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-05 21:24:36 +01:00
Nico Huber
252d39bb15 Fix some indentation flaws and break very long lines
Change-Id: I3efef6bc8f519382ffdd92eb10b4bcd1a4361ba9
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1657
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-05 21:23:09 +01:00
Nico Huber
ad874e3477 Correct FSB reading in speedstep ACPI
We parsed the MSR the wrong way, and didn't support some valid values.

Change-Id: Ia42e3de05dd76b6830aaa310ec82031d36def3a0
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1656
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-02 20:09:57 +01:00
Nico Huber
41392df0d1 Merge cpu/intel/acpi.h into cpu/intel/speedstep.h
We had only some MSR definitions in there, which are used in speedstep
related code. I think speedstep.h is the better and less confusing place
for these.

Change-Id: I1eddea72c1e2d3b2f651468b08b3c6f88b713149
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1655
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-01 22:21:12 +01:00
Stefan Reinauer
4cc8c70c32 Rework ACPI CST table generation
... in order to unify the Sandybridge and Lenovo implementations
currently used in the tree.

- use acpi_addr_t in acpigen_write_register()
- use acpi_cstate_t for cstate tables (and fix up
  the x60 and t60)
- drop cst_entry from acpigen.h

Change-Id: Icb87418d44d355f607c4a67300107b40f40b3b3f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/943
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2012-04-30 23:05:40 +02:00
Sven Schnelle
8d846135ff ACPI: mark empty get_cst_entries() weak
This function prevents the linker from choosing the right
get_cst_entries(), preventing writing the _CST tables.

Change-Id: I4bc0168aee110171faeaa081f217dfd1536bb821
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/496
Tested-by: build bot (Jenkins)
2012-01-09 11:07:18 +01:00
Sven Schnelle
5460097041 SPEEDSTEP: write _CST tables
Change-Id: Idb4b57044808918de343d31519768d0986840f01
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/321
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-10-25 18:59:10 +02:00
Stefan Reinauer
2a27b20226 factor out cpu power management base into a separate file. And fix a bug in
model_1067x

Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-11 22:14:44 +00:00
Patrick Georgi
361bd10bce Move Intel power management related defines to some central location.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6085 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-17 21:52:15 +00:00
Patrick Georgi
8463dd9db0 Rename build system variables to be more intuitive, and
at the same time let the user specify sources instead
of object files:
- objs becomes ramstage-srcs
- initobjs becomes romstage-srcs
- driver becomes driver-srcs
- smmobj becomes smm-srcs

The user servicable parts are named accordingly:
ramstage-y, romstage-y, driver-y, smm-y

Also, the object file names are properly renamed now, using
.ramstage.o, .romstage.o, .driver.o, .smm.o suffixes consistently.

Remove stubbed out via/epia-m700 dsdt/ssdt files - they didn't
easily fit in the build system and aren't useful anyway.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coreystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-30 16:55:02 +00:00
Stefan Reinauer
14e2277962 Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-27 06:56:47 +00:00
Stefan Reinauer
c02b4fc9db printk_foo -> printk(BIOS_FOO, ...)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-22 11:42:32 +00:00
Patrick Georgi
abf2ad716d newconfig is no more.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-07 21:43:48 +00:00
Stefan Reinauer
12ee934cb3 Make internal functions static in speedstep ACPI generation code.
(trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16 13:49:03 +00:00
Stefan Reinauer
105bace68d Some ACPI implementations don't like to see full paths within a scope for
CPU power management, so don't add the scope name

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24 18:36:51 +00:00
Myles Watson
b8e2027be8 Add CONFIG_GENERATE_* for tables so that the user can select which tables not
to build, but by default all the tables that are available are built.

Make PIRQ table build for qemu.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15 13:35:47 +00:00
Ronald G. Minnich
ebed2dc720 Change the intel cpu makefile.inc so that it fits the model better.
- intel/Makefile.inc only mentions sockets
- those sockets are conditionally included
- makefile.inc in socket directories are almost all unconditionally included
- Get rid of if where possible, use -$(CONFIG_VARIABLE) instead as per Kconfig 
  standards in linux kernel

See the Kconfig.tex documentation for questions.  


Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4561 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-21 18:08:49 +00:00
Patrick Georgi
0588d19abe Kconfig!
Works on Kontron, qemu, and serengeti. 

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>

tested on abuild only. 

Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-12 15:00:51 +00:00
Stefan Reinauer
4da810bd53 add intel speedstep support and some PM fixes.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21 21:41:42 +00:00