Commit Graph

2938 Commits

Author SHA1 Message Date
Nico Huber cde2bdf496 inteltool/Makefile: Clean .dependencies too
Change-Id: Ib4fc326c6612f2d142c8a5220949fbb4b97c37a1
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20176
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-14 12:54:40 +02:00
Nico Huber cce508fed2 inteltool/Makefile: Separate CPPFLAGS from CFLAGS
Separate the required CPPFLAGS from environment overridable CFLAGS.

Change-Id: I0c1c0a1cebc7f7971634bf57d4a2370939c43fda
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20175
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-14 12:54:36 +02:00
Julius Werner be3aa04f21 cbmem: Escape literal asterisks in log banner regex
I had a stupid. :( Asterisks have a special meaning in regexes, but I
just wanted to match three literal ones. This kills the regex parser.

Change-Id: Ia6149e72715d651c914583ed3235680ce5b7a2e0
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/20171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-06-14 02:17:14 +02:00
Paul Menzel 459d2198eb msrtool: Remove `no-pic` from `CFLAGS`
Commit 7c634ae8 (msrtool: added support for Intel CPUs) adds `no-pic` to
the compiler flags.

GCC 7.0.1 20170316 fails to built with the error below.

```
/usr/bin/ld: msrtool.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: msrutils.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: sys.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: linux.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: freebsd.o: relocation R_X86_64_32S against `.data' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: final link failed: Nonrepresentable section on output
```

Removing the flag causes the build to succeed with GCC 7, 6.3, and clang
4.0.

Change-Id: I3d7aed27ce7f84aa27305c68e2d5f14607c58ec8
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/18907
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-09 16:32:54 +02:00
Nico Huber 21e7424fc9 inteltool: Add Skylake PCI id in memory.c
Change-Id: I751e887bd90a258a69d13ea4ee9a409c8c86a3c3
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-09 16:25:20 +02:00
Paul Kocialkowki 37afb270b4 crossgcc: Resolve pointer and integer comparison in GCC
GCC version 7 is being a bit picky about pointer and integer comparison
by default, which triggers a crossgcc build error.

This backports a patch from upstream GCC to fix the issue.

Change-Id: I8b1e806c10604c0df080ac5edc667bf1141e2c17
Signed-off-by: Paul Kocialkowki <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/20103
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-08 23:29:15 +02:00
Martin Roth 811d93af39 util/lint: Give better warning for help spacing issue
Because the help block uses significant whitespace to determine whether
or not text is inside the help block, a mixture of spaces and tabs
confuses the parser.
If there's an unrecognized line, and the previous line was inside a help
block, it's likely that this line is too.

Additionally, this was found with a line that started '  configuration',
and threw a perl warning about an uninitialized value because the parser
thought this was the start of a new config line, but couldn't find the
symbol.  Now we make sure that config statements have whitespace after
the 'config' statement.

Change-Id: I46375738a18903b266ea9fff3102a1a91235e609
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/19155
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-07 23:13:38 +02:00
Martin Roth 8849f3be4a util/lint/kconfig_lint: update help checking
- Turn the check for help text with no indentation from a warning to
an error.
- Show an error if the help text is at the same indentation level as
the 'help' keyword.

Change-Id: Ibf868c83e2a128ceb6c4d3da7f2cf7dc237054e6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19851
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2017-06-07 23:12:40 +02:00
Paul Menzel d2bbaffe40 abuild: Remove space before tab
Fix up commit 26174c97 (abuild: Build saved config files)
unintentionally adding a space before a tabulator.

Change-Id: Ic51dee6ed9d640335c2bde5bd5dfad3691c505e0
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/17778
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-07 20:37:35 +02:00
Paul Menzel 59e2113670 Use www.coreboot.org over coreboot.org
<https://coreboot.org> is redirected to <https://www.coreboot.org>.

```
$ curl -I https://coreboot.org
HTTP/1.1 301 Moved Permanently
Server: nginx/1.8.1
Date: Mon, 05 Jun 2017 10:41:33 GMT
Content-Type: text/html
Content-Length: 184
Connection: keep-alive
Location: https://www.coreboot.org/

```

So use the command below to use the final location to save a redirect.

```
$ git grep -l https://coreboot.org \
| xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g'
```

Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20035
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07 12:05:44 +02:00
Paul Menzel a8843dee58 Use more secure HTTPS URLs for coreboot sites
The coreboot sites support HTTPS, and requests over HTTP with SSL are
also redirected. So use the more secure URLs, which also saves a
request most of the times, as nothing needs to be redirected.

Run the command below to replace all occurences.

```
$ git grep -l -E 'http://(www.|review.|)coreboot.org'
| xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g'
```

Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07 12:04:50 +02:00
Iru Cai 7f46fff24c superiotool: Add SMSC KBC1126
Device ID is read from HP Elitebook 2760p.

Based on:
- superio/smsc/kbc1100 (LDNs, keyboard, EC)
- DSDT from OEM firmware (COM1 and mailbox)
- Datasheet "KBC1122 Priliminary DS Rev. 0.8"

Change-Id: Id172ae42411a6d42a4ae7c7f30f96aeda3e6c384
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/18480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-06-06 21:13:16 +02:00
Arthur Heymans 54fd92bc34 util/cbfstool/lz4frame.c: Add comment to fall through
GCC7 has a new feature called -Wimplicit-fallthrough enabled by
default which checks for fallthrough in switch statements which is a
common error. When a fallthrough is actually intended a comment saying
so will satisfy GCC.

Fixes cbfstool not building with GCC7.

Change-Id: I83252fc96be7ce0971d4251b0fc88fbbd7440e71
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-06 19:37:21 +02:00
Nico Huber 3af6985050 util/nvramtool: Bail out on unaligned multi-byte entries
coreboot doesn't support CMOS options that are not byte aligned but
span multiple bytes. So treat them as error.

Change-Id: I2bcff62f153932e9c6646b4ce08e8da1c1532947
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/18246
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-06 19:31:38 +02:00
Nico Huber af83db2659 inteltool: #include <commonlib/helpers.h>
Change-Id: I66a243486a347313103ffd2cb2ca0447228e4054
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19586
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:46:54 +02:00
Nico Huber c269211149 buildgcc: Fix color output in download_showing_percentage
Probably this was never tested as the return to no color "\033[0m"
was printed verbatim.

Change-Id: I7e6e1049b062ffb138ebdaeb62ddc49581ff8db1
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/19811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:45:15 +02:00
Nico Huber c272a87f5c inteltool/ahci: Don't print reserved, all-zero registers
Behavior matches with other dumps of inteltool.

Change-Id: Id9755d251fc42185c9e8d574deb55c76e129b718
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:34:57 +02:00
Nico Huber da94e171b5 inteltool/ahci: Add Skylake support
The SATA device moved from 0:1f.2 to 0:17.0, 0:1f.2 became PMC. We
detect that by checking the PCI device class.

The ABAR MMIO space has grown to 2KiB and up to 8 ports are supported
now. For backwards compatibility, only dump port registers of ports
that are enabled in the Ports Implemented (PI) register.

Change-Id: I8e0f07d7359d92f689882b5afefa5ffb3766ee8b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19584
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:27:10 +02:00
Nico Huber 0660c6c1ff inteltool: Fix clean-up and close related TODO
We have to call pci_free_dev() for each device we allocated with
pci_get_dev(). Since that's not the case for `sb`, we can close
this TODO.

Change-Id: I1ef80c837263a205467f835156dcb8fa667d3a8f
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19587
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:22:12 +02:00
Nico Huber ed9c9ce268 inteltool: Add first Skylake PCI IDs
Change-Id: Ia5ef6b04f01e381174a4d8f73ddafeb18d488803
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19583
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:19:50 +02:00
Nico Huber ac826c8fd7 inteltool: Don't use PCI_FILL_SIZES
This is supposed to fill the `size[]` array with the actual sizes of
a device' MMIO ranges, but apparently isn't implemented for every
access method in libpci (we let the library choose one). It tells us
by clearing `PCI_FILL_SIZES` in the return value of `pci_fill_info()`
(which we don't check). Since we don't ever use `size`, we can just
make it clear and don't ask for it.

Change-Id: I3fb9334472f1c7563a9e17910190f73affbe067a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19582
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:19:45 +02:00
Youness Alaoui c4b4ff3b1f console/flashsconsole: Add spi flash console for debugging
If CONSOLE_SPI_FLASH config is enabled, we write the cbmem
messages to the 'CONSOLE' area in FMAP which allows us to grab the
log when we read the flash.

This is useful when you don't have usb debugging, and
UART lines are hard to find. Since a failure to boot would
require a hardware flasher anyways, we can get the log
at the same time.

This feature should only be used when no alternative is
found and only when we can't boot the system, because
excessive writes to the flash is not recommended.

This has been tested on purism/librem13 v2 and librem 15 v3 which
run Intel Skylake hardware. It has not been tested on other archs
or with a driver other than the fast_spi.

Change-Id: I74a297b94f6881d8c27cbe5168f161d8331c3df3
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-06-04 18:44:56 +02:00
Ronald G. Minnich 8db3c2a485 ifdtool: avoid potential unaligned pointer usage
In get_region, ifdtool assigns a not-known-to-be-aligned
pointer to a uint32_t *. Now you know and I know that it is
almost certainly aligned, but clang on OSX doesn't like this,
and it's a dicey thing to do in any event, just waiting
to hit someone hard at some future date.

Assign the pointer to a void * and use memmove to copy
the value to a uint32_t.

This usage is more portable to all little-endian architectures,
now, but is still not endian-safe. I doubt we'll ever care.

Change-Id: Ifb2f260c3363ab0f5b4a59e5a4e0b5ecf049fa96
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/19921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-02 01:58:20 +02:00
Martin Roth 16c49b5ff5 util/abuild: Start junit testcase block on kconfig failure
This should allow Jenkins to parse the build failures when Kconfig
generates an error.

Change-Id: I5f9083c346ac7b6502f854b7e1f1054e81954d76
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19861
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-05-27 16:54:23 +02:00
Mike Frysinger a8ca03223a cbfscomptool: fix display of time_t
Not all systems have sizeof(time_t) == sizeof(long), so
cast the delta here to a long to match the %ld format.

Change-Id: If235577fc35454ddb15043c5a543f614b6f16a9e
Signed-off-by: Mike Frysinger <vapier@chromium.org>
Reviewed-on: https://review.coreboot.org/19902
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-05-27 01:45:17 +02:00
Patrick Georgi 6b697ef207 util/hugo: no need to enable an interactive terminal
Change-Id: Iac4cdb003b2fe967b303c1f8e0eeb61673a02858
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/19930
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: Patrick Georgi <pgeorgi@google.com>
2017-05-26 18:36:47 +02:00
Patrick Georgi dc5eea1cfa util/hugo: mark source mounts read-only
hugo has no need to write there, it should only write to the
output directory.

Change-Id: Ie320f5017feccfa2e9ecba3c802e040487b44d67
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/19929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-05-26 18:36:19 +02:00
Patrick Georgi 04edaefad7 util/hugo: Add framework to build www.coreboot.org/Documentation
www.coreboot.org/Documentation is now built with hugo (www.gohugo.io)
based on files in this repo's /Documentation directory.

Also clarify that new additions to Documentation are under CC-BY 4.0 terms.

Change-Id: I000e15b29a182bb88b40de3d0178bf8cc54ba8af
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/19881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-25 23:04:36 +02:00
Patrick Georgi 9ec25f7678 util/lint: ignore some more binary file types
Namely png (images) and eot, ttf, woff (fonts)

Change-Id: I41e773c0adab796876a3b1e91e089ae89cbb04df
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/19880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-25 23:04:29 +02:00
Julius Werner d906bb68c3 cbmem_console: Improve 'cbmem -1' behavior for truncated pre-CBMEM logs
The 'cbmem -1' flag that cuts off console output before the last boot
will ignore content from earlier stages if it was truncated due to lack
of pre-CBMEM console space. This patch makes the "log truncated" message
more specific and adds it as an additional cut-off marker to 'cbmem -1'
to counteract that problem.

Also raise the log level of the coreboot banner one step to BIOS_NOTICE
to make it more likely to be included in the output for 'cbmem -1' to
find. (I believe NOTICE is reasonable but I wouldn't want to go as far
as WARN which should be reserved for actual problems. Of course this is
not ideal, but then again, our whole log-level system really isn't... it
would be better if we could make it always print a banner to the CBMEM
console without affecting the UART at the same time, but that would
require a larger amount of work.)

Change-Id: I58288593dfa757e14f4a9da4ffa7e27b0b66feb9
Reported-by: https://ticket.coreboot.org/issues/117
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/19720
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-05-18 19:49:43 +02:00
Martin Roth 7a00a63829 util/release: Update build-release script
- Put parameter comments and help text in the same order as the actual
parameters.
- Don't clone a new release tree from coreboot.org if a tree already
exists.
- Change COMMIT_ID parameter from optional to required.  If it was
omitted previously, the head of the master branch would be used.

Change-Id: Ifa434a4911dec777004788e3cf4e3436875d929b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19126
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-16 10:54:06 +02:00
Patrick Georgi 6d3ce3a996 xcompile: replace -print-librt-file-name with -print-libgcc-file-name
The former only exists with a custom patch while the latter is supported
by clang and in the absense of libgcc even points to clang's own runtime
libraries.

Change-Id: I1e30d5518cf78e1d66925d6f2ccada60a43bb4f8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/19658
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-05-16 10:52:37 +02:00
Aaron Durbin 7ad44eed08 util/cbmem: mmap underflow on low addresses
There is code to adjust the mapping down if a mmap fails
at a physical address. However, if the address is less
than the page size of the system then the physical offset will
underflow. This can actually cause a kernel panic on when
operating on /dev/mem.

The failing condition happens when the requested mapping at 0
fails in the kernel. The fallback path is taken and page size
is subtracted from 0 making a very large offset. The PAT code
in the kernel fails with a BUG_ON in reserve_memtype() checking
start >= end. The kernel needs to be fixed as well, but this
fallback path is wrong as well.

BUG=b:38211793

Change-Id: I32b0c15b2f1aa43fc57656d5d2d5f0e4e90e94ef
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/19679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-15 19:45:49 +02:00
Iru Cai 5fd00ce71a util: Add tools for dumping and inserting KBC1126 firmware images.
Change-Id: Ic521b177b9602ff042312cccaaa89371db7c5855
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/19071
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-05-11 16:48:40 +02:00
Paul Menzel 10984d1034 intelmetool: Enable warning *set-but-unused-variable*
There are no GCC warnings anymore about set but unused variables, and
Clang warns about this switch, as it doesn’t know it.

So remove the switch to use the default set by the switch `Wall`.

Change-Id: Ie9eb26d4f8b298af231b952b547b71d68c649eaf
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/19613
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-11 16:42:11 +02:00
Paul Menzel 90d41779d1 intelmetool: Comment out unused variable
Only commented out code uses the variable `csr`, and GCC complains about
it, when enabling the warning *unused-but-set-variable*.

```
Checking for pciutils and zlib... me.c: In function ‘mei_dump’:
me.c:50:18: warning: variable ‘csr’ set but not used [-Wunused-but-set-variable]
  struct mei_csr *csr;
                  ^~~
```

As the code is commented, also comment out the declaration of the variable.

Change-Id: I4ecb2b5e9f32906ccfc8a0628d2e0f2d3ad39a02
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/19612
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-05-11 16:41:56 +02:00
Vincent Legoll 0d2ff132e6 intelmetool: Enhance missing packages help
On Ubuntu 16.04 the libpci-dev package is required.

Change-Id: I942b3e96f5b8112166a105eb5a61f8f3cf16cb7c
Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com>
Reviewed-on: https://review.coreboot.org/19617
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-11 09:44:44 +02:00
Iru Cai 1f355178d6 superiotool: Add registers of LPC47N217
Change-Id: I460663593dc32f5b52c19c3f19fbc35b8252ed4d
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/19606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-05-08 17:45:40 +02:00
Paul Menzel 57d912bacc intelmetool: Use correct type for pointer
Use `uintptr_t` instead of `uint32_t`, fixing the error below on 64-bit
systems, where pointers are 64-bit wide.

```
cc -O0 -g -Wall -W -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-sign-compare -Wno-unused-function   -c -o intelmetool.o intelmetool.c
intelmetool.c: In function ‘dump_me_memory’:
intelmetool.c:85:45: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  dump = map_physical_exact((off_t)me_clone, (void *)me_clone, 0x2000000);
                                             ^
```

BUG=https://ticket.coreboot.org/issues/111
Change-Id: Id8d778e97090668ad9308a82b44c6b2b599fd6c3
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/19567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Paul Wise (Debian) <pabs@debian.org>
2017-05-06 07:54:47 +02:00
Arthur Heymans 915a4cadf4 blobtool/ifd-x200.set: Fix flashmap0 NR
NR indicates the last non empty region, which in this case is
GbE (region3). Needed for flashrom ifd layout support.

Change-Id: I3f4dcb0d41718dd176982679f8e045681fd3f486
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19565
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-05 22:43:46 +02:00
Paul Wise e311f94279 intelmetool: handle failures to mmap MEI memory
Fixes crashes when there is an error mapping memory.

    Error mapping physical memory 0x0000004275159040 [0x4000] ERRNO=1
    Segmentation fault (core dumped)

Change-Id: I5becc0c2870dd97297c4e8d1b101b95b31792ca7
Signed-off-by: Paul Wise <pabs3@bonedaddy.net>
Reviewed-on: https://review.coreboot.org/19562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-05 22:40:54 +02:00
Paul Wise 769f46625b intelmetool: free sb pci_dev struct allocated by pci_get_dev()
This fixes a memory leak in the activate_me() function.

Change-Id: I011b2f96122d8f88aed121352afe3f0d41edef60
Signed-off-by: Paul Wise <pabs3@bonedaddy.net>
Reviewed-on: https://review.coreboot.org/19561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-05 22:38:20 +02:00
Paul Wise 3c02699dd7 intelmetool: Print strerror() results for mmap errors
These are more human readable for folks not familiar with errno values.

Change-Id: I21352a00b583163472ccd3302a83adf1f8396c61
Signed-off-by: Paul Wise <pabs3@bonedaddy.net>
Reviewed-on: https://review.coreboot.org/19560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-05 22:37:28 +02:00
Omar Pakker ecf3489df8 util/autoport: Add the PCI ID of the iGPU for the Intel i7 3770K
This adds one of the Xeon labeled PCI IDs used in Sandy-/Ivy Bridge
generation processors. This ID is used by the non-Xeon i7 3770K.

Change-Id: Iad7745136efeb10ff745001413f4ccb6488b5ec0
Signed-off-by: Omar Pakker <omarpakker+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/19516
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-05-03 20:14:05 +02:00
Julius Werner b7b64a9f68 cbmem: Add new command line flag to dump console for one boot only
Even though the persistent CBMEM console is obviously awesome, there may
be cases where we only want to look at console output from the last boot.
It's easy to tell where one boot ends and another begins from the banner
message that coreboot prints at the start of every stage, but in order
to make it easier to find that point (especially for external tools),
let's put that functionality straight into the cbmem utility with a new
command line flag. Use the POSIX/libc regular expression API to find the
banner string for maximum compatilibity, even though it's kinda icky.

Change-Id: Ic17383507a884d84de9a2a880380cb15b25708a1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/19497
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2017-05-02 21:29:42 +02:00
Patrick Rudolph 0a4a4f7ae4 mb/*/mainboard.c: Get rid of SPI AFC register
The AFC—Additional Flash Control Register is set by
southbridge code.

Remove redundant calls and get rid of it in autoport.

Change-Id: I627082e09dd055e3b3c4dd8e0b90965a9fcb4342
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19493
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-05-01 14:02:19 +02:00
Youness Alaoui 1244a510f1 util/inteltool: Add support for Wildcat Point-LP Premium
The Wildcat Point-LP Premium is handled the same as the Wildcat Point-LP,
but it wasn't supported by inteltool.

Change-Id: I694514e1963f074582a3f5f81d63c20e7fa49189
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19445
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-05-01 00:43:52 +02:00
Youness Alaoui 085d87bcca util/inteltool: Break long lines in supported_chips_list
Lint prevents my next commit which adds a new line to the table
so it's better to break all the > 80 character lines so it will be
consistent with the new line I'm about to add.

Change-Id: Ic7ad0cb90e861cd830db1186225d4f839250792a
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19444
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-05-01 00:43:38 +02:00
Patrick Georgi 97a9df4f77 crossgcc: disable libsanitizer for the bootstrapped compiler
Ironically enough, libsanitizer is notorious for creating "uninitialized
variable" warnings with different compiler versions than the one it's
shipping with.

Since we don't need it for building the real compiler, just skip it.

Fixes building our compilers using the gnat-gpl 2014 compilers.

Change-Id: I2130dfdf3eaf07d77cd70777419fc0ae4642b843
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/19478
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-04-28 06:47:37 +02:00
Marc Jones d81250cebc amdfwtool: Move normal firmware 2 after fanless firmware2s
Move the images around in the image stitching. This addresses
an issue found with PSP firmware loading on the Google Kahlee
mainboard.

Note firmware1 must come before firmware2 in the image or
the PSP will not allow APU to execute.

Change-Id: I85963fa93d6efd707cedfbc04b92d302ad5de3b1
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19170
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-04-27 23:27:06 +02:00