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3 commits

Author SHA1 Message Date
Cliff Huang
95e4ffe848 acpi: Comply with ACPI specification by making _STR unicode strings
_STR should return Unicode string. From ACPI spec:
6.1.10 _STR (String)
The _STR object evaluates to an Unicode string that describes the
device or thermal zone.

BUG=NA
TEST=Check the changed _STR in SSDT to see if Unicode() macro is used

Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: I1f4b55a268c1dadbae456afe5821ae161b8e15a5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77695
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
2023-09-14 12:03:32 +00:00
Martin Roth
8324fe9211 drivers: Add SPDX license headers to Makefiles
To help identify the licenses of the various files contained in the
coreboot source, we've added SPDX headers to the top of all of the
.c and .h files. This extends that practice to Makefiles.

Any file in the coreboot project without a specific license is bound
to the license of the overall coreboot project, GPL Version 2.

This patch adds the GPL V2 license identifier to the top of all
makefiles in the drivers directory that don't already have an SPDX
license line at the top.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I8442bc18ce228eca88a084660be84bcd1c5de928
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68980
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-08-06 19:27:36 +00:00
Raul E Rangel
9bf32b9701 drivers/acpi: Add a chip driver to generate thermal zone
Given the following device tree entry:
    chip drivers/acpi/thermal_zone
        register "description" = ""CPU""

        use chrome_ec as temperature_controller

        register "sensor_id" = "0"

        register "polling_period" = "10"

        register "critical_temperature" = "91"

        register "passive_config" = "{
            .temperature = 85,
        }"

        register "use_acpi1_thermal_zone_scope" = "true"

        device generic 0 on end
    end

It will generate the following:
    Scope (\_TZ)
    {
        ThermalZone (TM00)
        {
            Name (_STR, "CPU")  // _STR: Description String
            Name (_RTV, Zero)  // _RTV: Relative Temperature Values
            Name (_TZP, 0x64)  // _TZP: Thermal Zone Polling
            Name (_CRT, 0x0E39)  // _CRT: Critical Temperature
            Name (_PSV, 0x0DFD)  // _PSV: Passive Temperature
            Name (_PSL, Package (0x10)  // _PSL: Passive List
            {
                \_SB.CP00,
                \_SB.CP01,
                \_SB.CP02,
                \_SB.CP03,
                \_SB.CP04,
                \_SB.CP05,
                \_SB.CP06,
                \_SB.CP07,
                \_SB.CP08,
                \_SB.CP09,
            })
            Name (_TC1, 0x02)  // _TC1: Thermal Constant 1
            Name (_TC2, 0x05)  // _TC2: Thermal Constant 2
            Name (_TSP, 0x14)  // _TSP: Thermal Sampling Period
            Method (_TMP, 0, Serialized)  // _TMP: Temperature
            {
                Return (\_SB.PCI0.LPCB.EC0.CREC.TMP (Zero))
            }
        }
    }

BUG=b:186166365
TEST=Boot guybrush to OS and verify thermal zone works

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Iee2a42db749f18eef6c3f73cdbb3441567301e5d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54132
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-05-20 08:01:11 +00:00