Commit Graph

101 Commits

Author SHA1 Message Date
Jonathan Neuschäfer c22ad581c8 arch/power8: Rename to ppc64
POWER8 is a specific implementation of ppc64, which is by now outdated
(POWER9 has been on the market for a while). Rename arch/power8/ to
potentially cover a wider range of hardware.

TEST=Toolchains built before/after this commit can build coreboot for
     emulation/qemu-power8 from before/after this commit.

Change-Id: I2d6f08b12a9ffc8a652ddcd6f24ad85ecb33ca52
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29943
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
2018-11-30 20:02:17 +00:00
Philipp Deppenwiese aea00f496b broadcom: Remove SoC and board support
The reason for this code cleanup is the legacy
Google Purin board which isn't available anymore
and AFAIK never made it into the stores.

* Remove broadcom cygnus SoC support
* Remove /util/broadcom tool
* Remove Google Purin mainboard
* Remove MAINTAINERS entries

Change-Id: I148dd7eb0192d396cb69bc26c4062f88a764771a
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29905
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-30 10:26:37 +00:00
Matt DeVillier 48418757cb MAINTAINERS: Add myself as a maintainer
Add myself as a maintainer for legacy Intel-based ChromeOS devices
for which I provide coreboot images as a comminuty member, and
as a maintainer for Purism devices in a professional capacity.

Change-Id: I70df3b9e4e36c2e5d73f8888fe0ec220aa8a91b7
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29913
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-11-30 10:25:30 +00:00
Philipp Deppenwiese 8f6af1cc52 MAINTAINERS: Update 9eSec maintainers
Update 9elements Cyber Security maintainers.

Change-Id: Ib683cb1b6a338667b065a71b05bdd3a4294e0296
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29820
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-27 12:42:33 +00:00
Patrick Georgi 501956750f MAINTAINERS: Drop "the rest" component
The semantics in util/scripts/maintainers.go have changed in that a
file can be part of multiple components. This means that all files
are part of "the rest" now, which doesn't make much sense.

Change-Id: I220afe27e78aa5358fca61851242812f2d763992
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/29657
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-24 22:11:57 +00:00
Werner Zeh e7207593ec MAINTAINERS: Add maintainer for all Siemens mc_xxxx mainboards
Change-Id: If8f662d088bf57fd27c5a01a47bc094dcb53a4de
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/29806
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-23 08:42:17 +00:00
Patrick Georgi 8fb453e6f5 MAINTAINERS: Add myself as maintainer for the getac/p470
Change-Id: Iae87a2e6f223f1d6e39034be4c8b511187eca6f5
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/c/29782
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-23 08:41:54 +00:00
zaolin 3313a78e36 northbridge/intel/fsp_*: Remove legacy SoCs
* Remove FSP Sandy/Ivybrige which are unused.
* Open Source implementation isn't final but
  good enough to replace FSP version.
* For new ports use NORTHBRIDGE_INTEL_IVYBRIDGE
  and NORTHBRIDGE_INTEL_SANDYBRIDGE

Change-Id: I7b6bc4bfdd0481c8fe5b2b3d8f8b2eb9aa3c3b9e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/29402
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-19 15:43:37 +00:00
Nico Huber c9826d7934 MAINTAINERS: Clarify this is about active upstream development
<vendor> seems to be confused about the meaning of our maintainers list.
I get the feeling some use it to organize corporate internal teams and
branches, adding names to the list that don't show up in Gerrit and even
if, often don't react to reviewing requests (within months). Maybe they
even don't know that this is about coreboot.org?

To clarify this:

  o Add an introductory paragraph mentioning development on coreboot.org.
  o Explicitly state that maintainers should be registered to Gerrit.
  o If a topic is tagged as `Supported` or `Maintained`, expect that
    somebody reacts to review requests.

Change-Id: I9ee038dc5ee1f4993ba1d230ef6e737f20e2ff8a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/29471
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Guckian
2018-11-14 15:43:41 +00:00
Jonathan Neuschäfer 2d1d47bf3e MAINTAINERS: Update RISC-V entry with SiFive and utils
Change-Id: Idd9e51fe2cb7a8497381f5b7440666cd709166b8
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28757
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-10-04 09:38:50 +00:00
Jonathan Neuschäfer ce8763fb13 mb/lowrisc: Remove the Nexys4DDR port
This board doesn't support the newest RISC-V Privileged Architecture
spec (1.10), and it's based on an FPGA so it's a moving target.

Now that there's actual RISC-V silicon out there (from SiFive),
mb/lowrisc/nexys4ddr will only continue to bitrot.

Change-Id: I4e3e715106a1a94381a563dc4a56781c35883c2d
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-09-26 15:36:40 +00:00
Angel Pons 58a7e397a1 util/ifdfake: Remove deprecated utility
Since ifdfake has been deprecated in favor of better alternatives, there
is no need to support it any further. Remove it from "util/", as well as
any leftover references in other files.

Change-Id: I45fe3d9fd606a61d5c3b9d0e6489a1df6d6510f0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-08-23 18:06:31 +00:00
Piotr Król 5044b01697 MAINTAINERS: change second PC Engines maintainer
Change-Id: I5eac0ae55e759ac9eb26783c11057db15fa62574
Signed-off-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-on: https://review.coreboot.org/25254
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-03-21 18:25:49 +00:00
Vanessa Eusebio 3ca534f302 MAINTAINERS: Update INTEL FSP DENVERTON-NS SOC & HARCUVAR CRB Maintainers
* Add David, Jeff, and Shine
* Remove Fei

Change-Id: I2803af80ac8c2b1d04ecd125c0cb123e736cdf7e
Signed-off-by: Vanessa Eusebio <vanessa.f.eusebio@intel.com>
Reviewed-on: https://review.coreboot.org/23847
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mariusz Szafranski
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2018-02-26 15:06:10 +00:00
Piotr Król dfd2a8b7e7 MAINTAINERS: add maintainers for all PC Engines mainboards
Change-Id: Ic5855257900fe6e1e8dd3551f1427a4fe51924b1
Signed-off-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-on: https://review.coreboot.org/21732
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kamil Wcisło <kamil.wcislo@3mdeb.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-10-31 15:45:53 +00:00
Sumeet Pawnikar 1638a85b49 MAINTAINERS: Remove extra unnecessary space
Remove extra unnecessary space at end of line.

Change-Id: I27688c3b8df71b875f1dc1020465d838756362be
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/21521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-09-15 04:29:29 +00:00
Julius Werner 848f5db345 MAINTAINERS: Add Julius as LZ4 maintainer
I imported the LZ4 compression code and want to keep an eye on it to
ensure that our sources stay in sync with upstream.

Change-Id: I249ce24f6630d66d451d993198cd267478e5743e
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/21488
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-09-15 02:51:55 +00:00
Mariusz Szafranski 025d819ee1 MAINTAINERS: Add INTEL FSP DENVERTON-NS SOC & HARCUVAR CRB
Add Intel FSP Atom C3000 SoC ("Denverton" and "Denverton-NS")
and Harcuvar CRB to the list.

Change-Id: I1c4bfd0900e8d425b95b5ef6c541b1e988846667
Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com>
Reviewed-on: https://review.coreboot.org/21515
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
2017-09-15 02:42:07 +00:00
Martin Roth 19fdedbdd6 MAINTAINERS: Update support list
I sent out an email to all of the maintainers asking to verify their
status.
- The email I sent to Marcin Wojciechowski bounced, so I'm removing the
Little Plains mainboard support.
- I'm removing myself from areas that I'm not currently maintaining.
- Due to Damien's schedule, he asked that the level for his pieces  be
changed from "Maintained" to "Odd Fixes".

I've added a list of infrastructure owners and backup owners - This is
strictly informational.

Change-Id: I39715611e8025bb535cdf1012be2bf05bf91fdaa
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Damien Zammit <damien@zamaudio.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2017-07-15 21:53:21 +00:00
Andrey Petrov 379c863ef1 MAINTAINERS: Update maintainer address (APLK and FSP 2.0)
Update my email address for Apollolake and FSP 2.0 driver. Also
downgrade support from "supported" to "maintained" as currently
no other Intel persons are assigned for the role.

Change-Id: I3033fc5ec8b0882ce79eeb15ee3eb13a228611a4
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/20550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-13 04:49:23 +00:00
Julius Werner c34e41fef6 MAINTAINERS: Add Julius as ARM architecture maintainer
I'm pretty much already doing this anyway, so I might as well document
it. Separating out some older ARM SoCs that were added by other people
and are pretty much orphaned now.

I can also fill out the MISSING: MEMLAYOUT point (since I wrote that).

Change-Id: I8b78d592a1ed68a42e5785ebdc13df2edf9007bf
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/20137
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-06-12 20:14:31 +02:00
Paul Menzel 59e2113670 Use www.coreboot.org over coreboot.org
<https://coreboot.org> is redirected to <https://www.coreboot.org>.

```
$ curl -I https://coreboot.org
HTTP/1.1 301 Moved Permanently
Server: nginx/1.8.1
Date: Mon, 05 Jun 2017 10:41:33 GMT
Content-Type: text/html
Content-Length: 184
Connection: keep-alive
Location: https://www.coreboot.org/

```

So use the command below to use the final location to save a redirect.

```
$ git grep -l https://coreboot.org \
| xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g'
```

Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20035
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07 12:05:44 +02:00
Paul Menzel a8843dee58 Use more secure HTTPS URLs for coreboot sites
The coreboot sites support HTTPS, and requests over HTTP with SSL are
also redirected. So use the more secure URLs, which also saves a
request most of the times, as nothing needs to be redirected.

Run the command below to replace all occurences.

```
$ git grep -l -E 'http://(www.|review.|)coreboot.org'
| xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g'
```

Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07 12:04:50 +02:00
Martin Roth e801fcb421 MAINTAINERS: Add Felix as superio maintainer
Change-Id: Ib53f591e5c8b03cd45b3fbd3db36ea2c28e4e060
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-05-30 18:30:14 +02:00
Martin Roth 954338d21b MAINTAINERS: Update list
- Fix whitespace: Change some spaces to tabs
- Add myself as an abuild maintainer
- Add util/xcompile and util/genbuild_h to the BUILD SYSTEM section
- Add new sections for utilities: docker, toolchain, and git
- Remove GENERIC DRAM section
- Remove the mailing list.  We don't want it to be added as a reviewer.

Change-Id: I78692fcac174d7b7c4d65911c85e4e2dacefcfc0
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18578
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-03-08 04:33:30 +01:00
Nicola Corna 4f4fc1891b MAINTAINERS: Add myself as me_cleaner maintainer
Change-Id: Ia95f6beb1546efdb75a49bccfe293822f0785d7a
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/18474
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins)
2017-03-02 22:03:47 +01:00
Jonathan Neuschäfer 9453c92b99 MAINTAINERS: Add lowrisc files to RISC-V
Change-Id: I8e9ff5821e15cd9a5966927a8cd8bd95f7021d58
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/17402
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2016-11-12 19:30:26 +01:00
Jonathan Neuschäfer 968292b8e1 MAINTAINERS: Add Jonathan Neuschäfer as RISC-V co-maintainer
Change-Id: I53ba5ba790ae683082e712dc0b92f1ac5bf27ddb
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16990
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2016-10-15 00:35:04 +02:00
Jonathan Neuschäfer 950d48fe6b MAINTAINERS/RISCV: Cover mb/emulation/spike-riscv
Change-Id: Id5f3f7f25041189d137ef4daa9f63a3b478763bc
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16988
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-15 00:34:51 +02:00
Andrey Petrov c2586db790 intel/amenia: Remove Amenia mainboard
The mainboard is not being worked on anymore, not available outside of
Intel and thus has litle practical use. Remove mainboard code completely.

Change-Id: Ic2c7ea3810ee70afc01a42786f8ccba9313134e4
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/16725
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-24 04:24:54 +02:00
Philipp Deppenwiese 6507e6f056 MAINTAINERS: Add myself as tpm support maintainer.
The tpm software stack, drivers and trustedboot
needs to be maintained.

Change-Id: I7b9ff9c4d7504c861de98ef3d8fcda53b20657c4
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/15312
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Tested-by: build bot (Jenkins)
2016-07-07 17:04:29 +02:00
Andrey Petrov 842dfe8d63 MAINTAINERS: Add myself for Apollolake SoC, FSP2.0, and Amenia mb
Change-Id: I9931263f0f51d6c726bd7c72042fae1155affb6e
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14963
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-26 23:52:57 +02:00
Martin Roth 7fae59b049 MAINTAINERS: Add maintainer for Pineview & x4x chipsets & boards
Change-Id: I3c34f6e69b3760a10e67bdc41c8ef0e629beb881
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14129
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-19 19:25:59 +02:00
York Yang fbec6b160e MAINTAINERS: Add Intel Broadwell-DE SOC and Camelback Mountain CRB
Add Intel Broadwell-DE SOC and Camelback Mountain CRB to the list

Change-Id: I3f0c3ae8b38ecf3c3676fe497ade8b74ba94485d
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: https://review.coreboot.org/14382
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-17 23:26:59 +02:00
Patrick Rudolph 6c1e81059d MAINTAINERS: add myself
Add myself to MAINTAINERS file.

Change-Id: I959ef193b69095b05ae9e42bd10d3b21001e0bc8
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/14262
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2016-04-13 02:01:38 +02:00
Philipp Deppenwiese 4cd9a11477 MAINTAINERS: Add maintainer for the intelmetool
If you want to be a maintainer Damien just add yourself to the list.

Change-Id: I15c646fc23d0804a8172da66d9297ab7977e6e6a
Reviewed-on: https://review.coreboot.org/14157
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-26 22:38:46 +01:00
Martin Roth 4a1c69aa34 MAINTAINERS: Add maintainer for Braswell SOC & Reference board
Change-Id: If3b49c3056abe6e1c1a14578d6c62a866bc6834d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14127
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Hannah Williams <hannah.williams@intel.com>
2016-03-22 19:58:35 +01:00
Martin Roth 57fcae1031 MAINTAINERS: Add maintainers for power8 architecture
Change-Id: I0eedda5f31c2809db7871b81ceb3045b782f9df1
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14126
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2016-03-21 14:35:05 +01:00
Martin Roth 057ce5fa55 MAINTAINERS: Add maintainer to lint scripts, board status & payloads
Change-Id: I3efd4116da1ffda2dbc768d1a447141d8ec76f81
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14128
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-21 14:32:24 +01:00
Martin Roth 2a3434757e MAINTAINERS: Add Timothy Pearson to the maintainers list
Change-Id: Ic0ae87ca1fff6d912702190d3fe8ab21285c8630
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13920
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2016-03-07 20:06:33 +01:00
Alexandru Gagniuc 000e8aa3f7 MAINTAINERS: Designate Intel maintainers for FSP 1.0 Baytrail
After several internal discussions, teams at Intel with stakes in
coreboot have decided to each assign one or more maintainers. These
maintainers can be expected to provide a point of contact for
assistance with technical (code-related) issues, testing on real
hardware, and making sure that their FSP-related areas continue to
function with upstream coreboot.

They understand that the inclusion of their information in the
MAINTAINERS file does not give them any extra power over their areas.
At the same time, nobody expects any community process to change.
The one expectation is that reasonable efforts be made to contact
these maintainers when making fundamental changes to their areas, or
when discussing code removal.

Change-Id: I62b2eaec8270ac1fce5bfbee3b3da68aba116b0f
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/11894
Reviewed-by: York Yang <york.yang@intel.com>
Tested-by: build bot (Jenkins)
2015-12-30 20:06:52 +01:00
Martin Roth 173fe0732b MAINTAINERS: Designate Intel maintainer for FSP 1.0 Ivy Bridge
After several internal discussions, teams at Intel with stakes in
coreboot have decided to each assign one or more maintainers. These
maintainers can be expected to provide a point of contact for
assistance with technical (code-related) issues, testing on real
hardware, and making sure that their FSP-related areas continue to
function with upstream coreboot.

They understand that the inclusion of their information in the
MAINTAINERS file does not give them any extra power over their areas.
At the same time, nobody expects any community process to change.
The one expectation is that reasonable efforts be made to contact
these maintainers when making fundamental changes to their areas, or
when discussing code removal.

Change-Id: I33d95db12d9e394360a207c8fbcfbc15723115c6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12642
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: York Yang <york.yang@intel.com>
2015-12-29 18:23:03 +01:00
Stefan Reinauer bf3dbaf86d MAINTAINERS: Define all subsystems and their files
Initial list of subsystems and the files that belong
to that subsystem, so we can define maintainers for them.

Change-Id: Icde0f387b486bea1bb63f9bbdf6330fa0a3ebcfa
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/10530
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-12-09 16:19:28 +01:00
Martin Roth 980a8c1d02 MAINTAINERS: Designate Intel maintainers for FSP 1.0 Rangeley
After several internal discussions, teams at Intel with stakes in
coreboot have decided to each assign one or more maintainers. These
maintainers can be expected to provide a point of contact for
assistance with technical (code-related) issues, testing on real
hardware, and making sure that their FSP-related areas continue to
function with upstream coreboot.

They understand that the inclusion of their information in the
MAINTAINERS file does not give them any extra power over their areas.
At the same time, nobody expects any community process to change.
The one expectation is that reasonable efforts be made to contact
these maintainers when making fundamental changes to their areas, or
when discussing code removal.

Change-Id: I7af7b37a5e3a233cc29adb20dd5bb8fa07dbdd53
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12643
Tested-by: build bot (Jenkins)
Reviewed-by: David Guckian <david.guckian@intel.com>
2015-12-07 16:05:39 +01:00
Martin Roth 533f6668a4 MAINTAINERS: Designate Intel maintainers for FSP 1.1
After several internal discussions, teams at Intel with stakes in
coreboot have decided to each assign one or more maintainers. These
maintainers can be expected to provide a point of contact for
assistance with technical (code-related) issues, testing on real
hardware, and making sure that their FSP-related areas continue to
function with upstream coreboot.

They understand that the inclusion of their information in the
MAINTAINERS file does not give them any extra power over their areas.
At the same time, nobody expects any community process to change.
The one expectation is that reasonable efforts be made to contact
these maintainers when making fundamental changes to their areas, or
when discussing code removal.

Change-Id: I1aa135838984973f648dec5dbb35ff73992e9289
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12644
Tested-by: build bot (Jenkins)
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
2015-12-06 22:20:56 +01:00
Alexander Couzens 753af5b104 MAINTAINERS: add myself to lenovo boards + ec
Change-Id: I94835e85046b5d2b63b9b822c0dc670bf939e57e
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/12650
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2015-12-06 18:52:02 +01:00
Martin Roth 3a18a80146 MAINTAINERS: Add myself to a few items
Change-Id: I407cee76cf1eb695732ad54287831a151a8ae3f5
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12491
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2015-11-21 03:44:33 +01:00
Stefan Reinauer a4ffe8aa49 MAINTAINERS: Fix format for file entries (F:)
According to the documentation further up in the file:

F:   drivers/net/    all files in and below drivers/net
F:   drivers/net/*   all files in drivers/net, but not below
F:   */net/*         all files in "any top level directory"/net

Add trailing slashes to directory names.

Change-Id: I7bfd2eb2528a75fb6af79a990acb89f5e4251383
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12118
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-22 20:20:48 +02:00
Patrick Georgi 65ff63f5ea MAINTAINERS: grab build system responsibility
Since nobody else stepped up, I hereby claim responsibility for the
build system.

Change-Id: I580b906d15fc2f049f0072e7b4608b1f19db83ab
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/10277
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-22 22:47:03 +02:00
Stefan Reinauer 2e38cc5cea MAINTAINERS: Add lint scripts
Change-Id: I54fea74897010718cf495ffb51667c9cb15869b9
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10124
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-07 19:41:22 +02:00
Stefan Reinauer c6e1f8aa12 Add MAINTAINERS file
Add a Linux style MAINTAINERS file and the get_maintainer.pl
script from the Linux kernel source (adapted to work in the
coreboot source tree)

Change-Id: I983e30c20c371d238cfa7c0a074587b731387c63
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10021
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-05-06 19:38:18 +02:00